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[DAGCombiner] Use FlagInserter in visitFSQRT (#163301)
Propagate fast-math flags for TLI.getSqrtEstimate etc.
1 parent 2f50a99 commit dd44e63

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3 files changed

+76
-90
lines changed

3 files changed

+76
-90
lines changed

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 34 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -658,13 +658,13 @@ namespace {
658658
bool InexpensiveOnly = false,
659659
std::optional<EVT> OutVT = std::nullopt);
660660
SDValue BuildDivEstimate(SDValue N, SDValue Op, SDNodeFlags Flags);
661-
SDValue buildRsqrtEstimate(SDValue Op, SDNodeFlags Flags);
662-
SDValue buildSqrtEstimate(SDValue Op, SDNodeFlags Flags);
663-
SDValue buildSqrtEstimateImpl(SDValue Op, SDNodeFlags Flags, bool Recip);
661+
SDValue buildRsqrtEstimate(SDValue Op);
662+
SDValue buildSqrtEstimate(SDValue Op);
663+
SDValue buildSqrtEstimateImpl(SDValue Op, bool Recip);
664664
SDValue buildSqrtNROneConst(SDValue Arg, SDValue Est, unsigned Iterations,
665-
SDNodeFlags Flags, bool Reciprocal);
665+
bool Reciprocal);
666666
SDValue buildSqrtNRTwoConst(SDValue Arg, SDValue Est, unsigned Iterations,
667-
SDNodeFlags Flags, bool Reciprocal);
667+
bool Reciprocal);
668668
SDValue MatchBSwapHWordLow(SDNode *N, SDValue N0, SDValue N1,
669669
bool DemandHighBits = true);
670670
SDValue MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1);
@@ -18590,20 +18590,18 @@ SDValue DAGCombiner::visitFDIV(SDNode *N) {
1859018590
// If this FDIV is part of a reciprocal square root, it may be folded
1859118591
// into a target-specific square root estimate instruction.
1859218592
if (N1.getOpcode() == ISD::FSQRT) {
18593-
if (SDValue RV = buildRsqrtEstimate(N1.getOperand(0), Flags))
18593+
if (SDValue RV = buildRsqrtEstimate(N1.getOperand(0)))
1859418594
return DAG.getNode(ISD::FMUL, DL, VT, N0, RV);
1859518595
} else if (N1.getOpcode() == ISD::FP_EXTEND &&
1859618596
N1.getOperand(0).getOpcode() == ISD::FSQRT) {
18597-
if (SDValue RV =
18598-
buildRsqrtEstimate(N1.getOperand(0).getOperand(0), Flags)) {
18597+
if (SDValue RV = buildRsqrtEstimate(N1.getOperand(0).getOperand(0))) {
1859918598
RV = DAG.getNode(ISD::FP_EXTEND, SDLoc(N1), VT, RV);
1860018599
AddToWorklist(RV.getNode());
1860118600
return DAG.getNode(ISD::FMUL, DL, VT, N0, RV);
1860218601
}
1860318602
} else if (N1.getOpcode() == ISD::FP_ROUND &&
1860418603
N1.getOperand(0).getOpcode() == ISD::FSQRT) {
18605-
if (SDValue RV =
18606-
buildRsqrtEstimate(N1.getOperand(0).getOperand(0), Flags)) {
18604+
if (SDValue RV = buildRsqrtEstimate(N1.getOperand(0).getOperand(0))) {
1860718605
RV = DAG.getNode(ISD::FP_ROUND, SDLoc(N1), VT, RV, N1.getOperand(1));
1860818606
AddToWorklist(RV.getNode());
1860918607
return DAG.getNode(ISD::FMUL, DL, VT, N0, RV);
@@ -18635,7 +18633,7 @@ SDValue DAGCombiner::visitFDIV(SDNode *N) {
1863518633
SDValue AA = DAG.getNode(ISD::FMUL, DL, VT, A, A);
1863618634
SDValue AAZ =
1863718635
DAG.getNode(ISD::FMUL, DL, VT, AA, Sqrt.getOperand(0));
18638-
if (SDValue Rsqrt = buildRsqrtEstimate(AAZ, Flags))
18636+
if (SDValue Rsqrt = buildRsqrtEstimate(AAZ))
1863918637
return DAG.getNode(ISD::FMUL, DL, VT, N0, Rsqrt);
1864018638

1864118639
// Estimate creation failed. Clean up speculatively created nodes.
@@ -18645,7 +18643,7 @@ SDValue DAGCombiner::visitFDIV(SDNode *N) {
1864518643

1864618644
// We found a FSQRT, so try to make this fold:
1864718645
// X / (Y * sqrt(Z)) -> X * (rsqrt(Z) / Y)
18648-
if (SDValue Rsqrt = buildRsqrtEstimate(Sqrt.getOperand(0), Flags)) {
18646+
if (SDValue Rsqrt = buildRsqrtEstimate(Sqrt.getOperand(0))) {
1864918647
SDValue Div = DAG.getNode(ISD::FDIV, SDLoc(N1), VT, Rsqrt, Y);
1865018648
AddToWorklist(Div.getNode());
1865118649
return DAG.getNode(ISD::FMUL, DL, VT, N0, Div);
@@ -18742,11 +18740,12 @@ SDValue DAGCombiner::visitFSQRT(SDNode *N) {
1874218740
return SDValue();
1874318741

1874418742
// FSQRT nodes have flags that propagate to the created nodes.
18743+
SelectionDAG::FlagInserter FlagInserter(DAG, Flags);
1874518744
// TODO: If this is N0/sqrt(N0), and we reach this node before trying to
1874618745
// transform the fdiv, we may produce a sub-optimal estimate sequence
1874718746
// because the reciprocal calculation may not have to filter out a
1874818747
// 0.0 input.
18749-
return buildSqrtEstimate(N0, Flags);
18748+
return buildSqrtEstimate(N0);
1875018749
}
1875118750

1875218751
/// copysign(x, fp_extend(y)) -> copysign(x, y)
@@ -29743,28 +29742,27 @@ SDValue DAGCombiner::BuildDivEstimate(SDValue N, SDValue Op,
2974329742
/// X_{i+1} = X_i (1.5 - A X_i^2 / 2)
2974429743
/// As a result, we precompute A/2 prior to the iteration loop.
2974529744
SDValue DAGCombiner::buildSqrtNROneConst(SDValue Arg, SDValue Est,
29746-
unsigned Iterations,
29747-
SDNodeFlags Flags, bool Reciprocal) {
29745+
unsigned Iterations, bool Reciprocal) {
2974829746
EVT VT = Arg.getValueType();
2974929747
SDLoc DL(Arg);
2975029748
SDValue ThreeHalves = DAG.getConstantFP(1.5, DL, VT);
2975129749

2975229750
// We now need 0.5 * Arg which we can write as (1.5 * Arg - Arg) so that
2975329751
// this entire sequence requires only one FP constant.
29754-
SDValue HalfArg = DAG.getNode(ISD::FMUL, DL, VT, ThreeHalves, Arg, Flags);
29755-
HalfArg = DAG.getNode(ISD::FSUB, DL, VT, HalfArg, Arg, Flags);
29752+
SDValue HalfArg = DAG.getNode(ISD::FMUL, DL, VT, ThreeHalves, Arg);
29753+
HalfArg = DAG.getNode(ISD::FSUB, DL, VT, HalfArg, Arg);
2975629754

2975729755
// Newton iterations: Est = Est * (1.5 - HalfArg * Est * Est)
2975829756
for (unsigned i = 0; i < Iterations; ++i) {
29759-
SDValue NewEst = DAG.getNode(ISD::FMUL, DL, VT, Est, Est, Flags);
29760-
NewEst = DAG.getNode(ISD::FMUL, DL, VT, HalfArg, NewEst, Flags);
29761-
NewEst = DAG.getNode(ISD::FSUB, DL, VT, ThreeHalves, NewEst, Flags);
29762-
Est = DAG.getNode(ISD::FMUL, DL, VT, Est, NewEst, Flags);
29757+
SDValue NewEst = DAG.getNode(ISD::FMUL, DL, VT, Est, Est);
29758+
NewEst = DAG.getNode(ISD::FMUL, DL, VT, HalfArg, NewEst);
29759+
NewEst = DAG.getNode(ISD::FSUB, DL, VT, ThreeHalves, NewEst);
29760+
Est = DAG.getNode(ISD::FMUL, DL, VT, Est, NewEst);
2976329761
}
2976429762

2976529763
// If non-reciprocal square root is requested, multiply the result by Arg.
2976629764
if (!Reciprocal)
29767-
Est = DAG.getNode(ISD::FMUL, DL, VT, Est, Arg, Flags);
29765+
Est = DAG.getNode(ISD::FMUL, DL, VT, Est, Arg);
2976829766

2976929767
return Est;
2977029768
}
@@ -29775,8 +29773,7 @@ SDValue DAGCombiner::buildSqrtNROneConst(SDValue Arg, SDValue Est,
2977529773
/// =>
2977629774
/// X_{i+1} = (-0.5 * X_i) * (A * X_i * X_i + (-3.0))
2977729775
SDValue DAGCombiner::buildSqrtNRTwoConst(SDValue Arg, SDValue Est,
29778-
unsigned Iterations,
29779-
SDNodeFlags Flags, bool Reciprocal) {
29776+
unsigned Iterations, bool Reciprocal) {
2978029777
EVT VT = Arg.getValueType();
2978129778
SDLoc DL(Arg);
2978229779
SDValue MinusThree = DAG.getConstantFP(-3.0, DL, VT);
@@ -29789,23 +29786,23 @@ SDValue DAGCombiner::buildSqrtNRTwoConst(SDValue Arg, SDValue Est,
2978929786
// Newton iterations for reciprocal square root:
2979029787
// E = (E * -0.5) * ((A * E) * E + -3.0)
2979129788
for (unsigned i = 0; i < Iterations; ++i) {
29792-
SDValue AE = DAG.getNode(ISD::FMUL, DL, VT, Arg, Est, Flags);
29793-
SDValue AEE = DAG.getNode(ISD::FMUL, DL, VT, AE, Est, Flags);
29794-
SDValue RHS = DAG.getNode(ISD::FADD, DL, VT, AEE, MinusThree, Flags);
29789+
SDValue AE = DAG.getNode(ISD::FMUL, DL, VT, Arg, Est);
29790+
SDValue AEE = DAG.getNode(ISD::FMUL, DL, VT, AE, Est);
29791+
SDValue RHS = DAG.getNode(ISD::FADD, DL, VT, AEE, MinusThree);
2979529792

2979629793
// When calculating a square root at the last iteration build:
2979729794
// S = ((A * E) * -0.5) * ((A * E) * E + -3.0)
2979829795
// (notice a common subexpression)
2979929796
SDValue LHS;
2980029797
if (Reciprocal || (i + 1) < Iterations) {
2980129798
// RSQRT: LHS = (E * -0.5)
29802-
LHS = DAG.getNode(ISD::FMUL, DL, VT, Est, MinusHalf, Flags);
29799+
LHS = DAG.getNode(ISD::FMUL, DL, VT, Est, MinusHalf);
2980329800
} else {
2980429801
// SQRT: LHS = (A * E) * -0.5
29805-
LHS = DAG.getNode(ISD::FMUL, DL, VT, AE, MinusHalf, Flags);
29802+
LHS = DAG.getNode(ISD::FMUL, DL, VT, AE, MinusHalf);
2980629803
}
2980729804

29808-
Est = DAG.getNode(ISD::FMUL, DL, VT, LHS, RHS, Flags);
29805+
Est = DAG.getNode(ISD::FMUL, DL, VT, LHS, RHS);
2980929806
}
2981029807

2981129808
return Est;
@@ -29814,8 +29811,7 @@ SDValue DAGCombiner::buildSqrtNRTwoConst(SDValue Arg, SDValue Est,
2981429811
/// Build code to calculate either rsqrt(Op) or sqrt(Op). In the latter case
2981529812
/// Op*rsqrt(Op) is actually computed, so additional postprocessing is needed if
2981629813
/// Op can be zero.
29817-
SDValue DAGCombiner::buildSqrtEstimateImpl(SDValue Op, SDNodeFlags Flags,
29818-
bool Reciprocal) {
29814+
SDValue DAGCombiner::buildSqrtEstimateImpl(SDValue Op, bool Reciprocal) {
2981929815
if (LegalDAG)
2982029816
return SDValue();
2982129817

@@ -29843,8 +29839,8 @@ SDValue DAGCombiner::buildSqrtEstimateImpl(SDValue Op, SDNodeFlags Flags,
2984329839

2984429840
if (Iterations > 0)
2984529841
Est = UseOneConstNR
29846-
? buildSqrtNROneConst(Op, Est, Iterations, Flags, Reciprocal)
29847-
: buildSqrtNRTwoConst(Op, Est, Iterations, Flags, Reciprocal);
29842+
? buildSqrtNROneConst(Op, Est, Iterations, Reciprocal)
29843+
: buildSqrtNRTwoConst(Op, Est, Iterations, Reciprocal);
2984829844
if (!Reciprocal) {
2984929845
SDLoc DL(Op);
2985029846
// Try the target specific test first.
@@ -29862,12 +29858,12 @@ SDValue DAGCombiner::buildSqrtEstimateImpl(SDValue Op, SDNodeFlags Flags,
2986229858
return SDValue();
2986329859
}
2986429860

29865-
SDValue DAGCombiner::buildRsqrtEstimate(SDValue Op, SDNodeFlags Flags) {
29866-
return buildSqrtEstimateImpl(Op, Flags, true);
29861+
SDValue DAGCombiner::buildRsqrtEstimate(SDValue Op) {
29862+
return buildSqrtEstimateImpl(Op, true);
2986729863
}
2986829864

29869-
SDValue DAGCombiner::buildSqrtEstimate(SDValue Op, SDNodeFlags Flags) {
29870-
return buildSqrtEstimateImpl(Op, Flags, false);
29865+
SDValue DAGCombiner::buildSqrtEstimate(SDValue Op) {
29866+
return buildSqrtEstimateImpl(Op, false);
2987129867
}
2987229868

2987329869
/// Return true if there is any possibility that the two addresses overlap.

llvm/test/CodeGen/PowerPC/fmf-propagation.ll

Lines changed: 40 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -325,24 +325,21 @@ define float @sqrt_afn_ieee(float %x) #0 {
325325
;
326326
; GLOBAL-LABEL: sqrt_afn_ieee:
327327
; GLOBAL: # %bb.0:
328-
; GLOBAL-NEXT: addis 3, 2, .LCPI11_1@toc@ha
329-
; GLOBAL-NEXT: xsabsdp 0, 1
330-
; GLOBAL-NEXT: lfs 2, .LCPI11_1@toc@l(3)
331-
; GLOBAL-NEXT: fcmpu 0, 0, 2
332-
; GLOBAL-NEXT: xxlxor 0, 0, 0
333-
; GLOBAL-NEXT: blt 0, .LBB11_2
334-
; GLOBAL-NEXT: # %bb.1:
335328
; GLOBAL-NEXT: xsrsqrtesp 0, 1
336329
; GLOBAL-NEXT: vspltisw 2, -3
337330
; GLOBAL-NEXT: addis 3, 2, .LCPI11_0@toc@ha
338-
; GLOBAL-NEXT: xvcvsxwdp 2, 34
339-
; GLOBAL-NEXT: xsmulsp 1, 1, 0
340-
; GLOBAL-NEXT: xsmaddasp 2, 1, 0
331+
; GLOBAL-NEXT: xvcvsxwdp 3, 34
332+
; GLOBAL-NEXT: xsmulsp 2, 1, 0
333+
; GLOBAL-NEXT: xsabsdp 1, 1
334+
; GLOBAL-NEXT: xsmaddasp 3, 2, 0
341335
; GLOBAL-NEXT: lfs 0, .LCPI11_0@toc@l(3)
342-
; GLOBAL-NEXT: xsmulsp 0, 1, 0
343-
; GLOBAL-NEXT: xsmulsp 0, 0, 2
344-
; GLOBAL-NEXT: .LBB11_2:
345-
; GLOBAL-NEXT: fmr 1, 0
336+
; GLOBAL-NEXT: addis 3, 2, .LCPI11_1@toc@ha
337+
; GLOBAL-NEXT: xsmulsp 0, 2, 0
338+
; GLOBAL-NEXT: lfs 2, .LCPI11_1@toc@l(3)
339+
; GLOBAL-NEXT: xssubsp 1, 1, 2
340+
; GLOBAL-NEXT: xxlxor 2, 2, 2
341+
; GLOBAL-NEXT: xsmulsp 0, 0, 3
342+
; GLOBAL-NEXT: fsel 1, 1, 0, 2
346343
; GLOBAL-NEXT: blr
347344
%rt = call afn ninf float @llvm.sqrt.f32(float %x)
348345
ret float %rt
@@ -393,21 +390,19 @@ define float @sqrt_afn_preserve_sign(float %x) #1 {
393390
;
394391
; GLOBAL-LABEL: sqrt_afn_preserve_sign:
395392
; GLOBAL: # %bb.0:
396-
; GLOBAL-NEXT: xxlxor 0, 0, 0
397-
; GLOBAL-NEXT: fcmpu 0, 1, 0
398-
; GLOBAL-NEXT: beq 0, .LBB13_2
399-
; GLOBAL-NEXT: # %bb.1:
400393
; GLOBAL-NEXT: xsrsqrtesp 0, 1
401394
; GLOBAL-NEXT: vspltisw 2, -3
402395
; GLOBAL-NEXT: addis 3, 2, .LCPI13_0@toc@ha
403-
; GLOBAL-NEXT: xvcvsxwdp 2, 34
404-
; GLOBAL-NEXT: xsmulsp 1, 1, 0
405-
; GLOBAL-NEXT: xsmaddasp 2, 1, 0
396+
; GLOBAL-NEXT: xvcvsxwdp 3, 34
397+
; GLOBAL-NEXT: xsmulsp 2, 1, 0
398+
; GLOBAL-NEXT: xsmaddasp 3, 2, 0
406399
; GLOBAL-NEXT: lfs 0, .LCPI13_0@toc@l(3)
407-
; GLOBAL-NEXT: xsmulsp 0, 1, 0
408-
; GLOBAL-NEXT: xsmulsp 0, 0, 2
409-
; GLOBAL-NEXT: .LBB13_2:
410-
; GLOBAL-NEXT: fmr 1, 0
400+
; GLOBAL-NEXT: xsmulsp 0, 2, 0
401+
; GLOBAL-NEXT: xxlxor 2, 2, 2
402+
; GLOBAL-NEXT: xsmulsp 0, 0, 3
403+
; GLOBAL-NEXT: fsel 2, 1, 2, 0
404+
; GLOBAL-NEXT: xsnegdp 1, 1
405+
; GLOBAL-NEXT: fsel 1, 1, 2, 0
411406
; GLOBAL-NEXT: blr
412407
%rt = call afn ninf float @llvm.sqrt.f32(float %x)
413408
ret float %rt
@@ -462,24 +457,21 @@ define float @sqrt_fast_ieee(float %x) #0 {
462457
;
463458
; GLOBAL-LABEL: sqrt_fast_ieee:
464459
; GLOBAL: # %bb.0:
465-
; GLOBAL-NEXT: addis 3, 2, .LCPI15_1@toc@ha
466-
; GLOBAL-NEXT: xsabsdp 0, 1
467-
; GLOBAL-NEXT: lfs 2, .LCPI15_1@toc@l(3)
468-
; GLOBAL-NEXT: fcmpu 0, 0, 2
469-
; GLOBAL-NEXT: xxlxor 0, 0, 0
470-
; GLOBAL-NEXT: blt 0, .LBB15_2
471-
; GLOBAL-NEXT: # %bb.1:
472460
; GLOBAL-NEXT: xsrsqrtesp 0, 1
473461
; GLOBAL-NEXT: vspltisw 2, -3
474462
; GLOBAL-NEXT: addis 3, 2, .LCPI15_0@toc@ha
475-
; GLOBAL-NEXT: xvcvsxwdp 2, 34
476-
; GLOBAL-NEXT: xsmulsp 1, 1, 0
477-
; GLOBAL-NEXT: xsmaddasp 2, 1, 0
463+
; GLOBAL-NEXT: xvcvsxwdp 3, 34
464+
; GLOBAL-NEXT: xsmulsp 2, 1, 0
465+
; GLOBAL-NEXT: xsabsdp 1, 1
466+
; GLOBAL-NEXT: xsmaddasp 3, 2, 0
478467
; GLOBAL-NEXT: lfs 0, .LCPI15_0@toc@l(3)
479-
; GLOBAL-NEXT: xsmulsp 0, 1, 0
480-
; GLOBAL-NEXT: xsmulsp 0, 0, 2
481-
; GLOBAL-NEXT: .LBB15_2:
482-
; GLOBAL-NEXT: fmr 1, 0
468+
; GLOBAL-NEXT: addis 3, 2, .LCPI15_1@toc@ha
469+
; GLOBAL-NEXT: xsmulsp 0, 2, 0
470+
; GLOBAL-NEXT: lfs 2, .LCPI15_1@toc@l(3)
471+
; GLOBAL-NEXT: xssubsp 1, 1, 2
472+
; GLOBAL-NEXT: xxlxor 2, 2, 2
473+
; GLOBAL-NEXT: xsmulsp 0, 0, 3
474+
; GLOBAL-NEXT: fsel 1, 1, 0, 2
483475
; GLOBAL-NEXT: blr
484476
%rt = call contract reassoc afn ninf float @llvm.sqrt.f32(float %x)
485477
ret float %rt
@@ -517,21 +509,19 @@ define float @sqrt_fast_preserve_sign(float %x) #1 {
517509
;
518510
; GLOBAL-LABEL: sqrt_fast_preserve_sign:
519511
; GLOBAL: # %bb.0:
520-
; GLOBAL-NEXT: xxlxor 0, 0, 0
521-
; GLOBAL-NEXT: fcmpu 0, 1, 0
522-
; GLOBAL-NEXT: beq 0, .LBB16_2
523-
; GLOBAL-NEXT: # %bb.1:
524512
; GLOBAL-NEXT: xsrsqrtesp 0, 1
525513
; GLOBAL-NEXT: vspltisw 2, -3
526514
; GLOBAL-NEXT: addis 3, 2, .LCPI16_0@toc@ha
527-
; GLOBAL-NEXT: xvcvsxwdp 2, 34
528-
; GLOBAL-NEXT: xsmulsp 1, 1, 0
529-
; GLOBAL-NEXT: xsmaddasp 2, 1, 0
515+
; GLOBAL-NEXT: xvcvsxwdp 3, 34
516+
; GLOBAL-NEXT: xsmulsp 2, 1, 0
517+
; GLOBAL-NEXT: xsmaddasp 3, 2, 0
530518
; GLOBAL-NEXT: lfs 0, .LCPI16_0@toc@l(3)
531-
; GLOBAL-NEXT: xsmulsp 0, 1, 0
532-
; GLOBAL-NEXT: xsmulsp 0, 0, 2
533-
; GLOBAL-NEXT: .LBB16_2:
534-
; GLOBAL-NEXT: fmr 1, 0
519+
; GLOBAL-NEXT: xsmulsp 0, 2, 0
520+
; GLOBAL-NEXT: xxlxor 2, 2, 2
521+
; GLOBAL-NEXT: xsmulsp 0, 0, 3
522+
; GLOBAL-NEXT: fsel 2, 1, 2, 0
523+
; GLOBAL-NEXT: xsnegdp 1, 1
524+
; GLOBAL-NEXT: fsel 1, 1, 2, 0
535525
; GLOBAL-NEXT: blr
536526
%rt = call contract reassoc ninf afn float @llvm.sqrt.f32(float %x)
537527
ret float %rt

llvm/test/CodeGen/X86/sqrt-fastmath-mir.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@ define float @sqrt_ieee_ninf(float %f) #0 {
2424
; CHECK-NEXT: {{ $}}
2525
; CHECK-NEXT: [[COPY:%[0-9]+]]:fr32 = COPY $xmm0
2626
; CHECK-NEXT: [[DEF:%[0-9]+]]:fr32 = IMPLICIT_DEF
27-
; CHECK-NEXT: [[VRSQRTSSr:%[0-9]+]]:fr32 = VRSQRTSSr killed [[DEF]], [[COPY]]
27+
; CHECK-NEXT: [[VRSQRTSSr:%[0-9]+]]:fr32 = ninf afn VRSQRTSSr killed [[DEF]], [[COPY]]
2828
; CHECK-NEXT: [[VMULSSrr:%[0-9]+]]:fr32 = ninf afn nofpexcept VMULSSrr [[COPY]], [[VRSQRTSSr]], implicit $mxcsr
2929
; CHECK-NEXT: [[VMOVSSrm_alt:%[0-9]+]]:fr32 = VMOVSSrm_alt $rip, 1, $noreg, %const.0, $noreg :: (load (s32) from constant-pool)
3030
; CHECK-NEXT: [[VFMADD213SSr:%[0-9]+]]:fr32 = ninf afn nofpexcept VFMADD213SSr [[VRSQRTSSr]], killed [[VMULSSrr]], [[VMOVSSrm_alt]], implicit $mxcsr
@@ -71,7 +71,7 @@ define float @sqrt_daz_ninf(float %f) #1 {
7171
; CHECK-NEXT: {{ $}}
7272
; CHECK-NEXT: [[COPY:%[0-9]+]]:fr32 = COPY $xmm0
7373
; CHECK-NEXT: [[DEF:%[0-9]+]]:fr32 = IMPLICIT_DEF
74-
; CHECK-NEXT: [[VRSQRTSSr:%[0-9]+]]:fr32 = VRSQRTSSr killed [[DEF]], [[COPY]]
74+
; CHECK-NEXT: [[VRSQRTSSr:%[0-9]+]]:fr32 = ninf afn VRSQRTSSr killed [[DEF]], [[COPY]]
7575
; CHECK-NEXT: [[VMULSSrr:%[0-9]+]]:fr32 = ninf afn nofpexcept VMULSSrr [[COPY]], [[VRSQRTSSr]], implicit $mxcsr
7676
; CHECK-NEXT: [[VMOVSSrm_alt:%[0-9]+]]:fr32 = VMOVSSrm_alt $rip, 1, $noreg, %const.0, $noreg :: (load (s32) from constant-pool)
7777
; CHECK-NEXT: [[VFMADD213SSr:%[0-9]+]]:fr32 = ninf afn nofpexcept VFMADD213SSr [[VRSQRTSSr]], killed [[VMULSSrr]], [[VMOVSSrm_alt]], implicit $mxcsr

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