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paulwalker-armpaulwalker-arm
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[LLVM][IRBuilder] Use NUW arithmetic for Create{ElementCount,TypeSize}. (#143532)
This put the onus on the caller to ensure the result type is big enough. In the unlikely event a cropped result is required then explicitly truncate a safe value.
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‎clang/test/CodeGen/builtin_vectorelements.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -85,15 +85,15 @@ int test_builtin_vectorelements_neon64x1() {
8585
long test_builtin_vectorelements_sve32() {
8686
// SVE: i64 @test_builtin_vectorelements_sve32(
8787
// SVE: [[VSCALE:%.+]] = call i64 @llvm.vscale.i64()
88-
// SVE: [[RES:%.+]] = mul i64 [[VSCALE]], 4
88+
// SVE: [[RES:%.+]] = mul nuw i64 [[VSCALE]], 4
8989
// SVE: ret i64 [[RES]]
9090
return __builtin_vectorelements(svuint32_t);
9191
}
9292

9393
long test_builtin_vectorelements_sve8() {
9494
// SVE: i64 @test_builtin_vectorelements_sve8(
9595
// SVE: [[VSCALE:%.+]] = call i64 @llvm.vscale.i64()
96-
// SVE: [[RES:%.+]] = mul i64 [[VSCALE]], 16
96+
// SVE: [[RES:%.+]] = mul nuw i64 [[VSCALE]], 16
9797
// SVE: ret i64 [[RES]]
9898
return __builtin_vectorelements(svuint8_t);
9999
}
@@ -105,7 +105,7 @@ long test_builtin_vectorelements_sve8() {
105105
long test_builtin_vectorelements_riscv8() {
106106
// RISCV: i64 @test_builtin_vectorelements_riscv8(
107107
// RISCV: [[VSCALE:%.+]] = call i64 @llvm.vscale.i64()
108-
// RISCV: [[RES:%.+]] = mul i64 [[VSCALE]], 8
108+
// RISCV: [[RES:%.+]] = mul nuw i64 [[VSCALE]], 8
109109
// RISCV: ret i64 [[RES]]
110110
return __builtin_vectorelements(vuint8m1_t);
111111
}
@@ -120,7 +120,7 @@ long test_builtin_vectorelements_riscv64() {
120120
long test_builtin_vectorelements_riscv32m2() {
121121
// RISCV: i64 @test_builtin_vectorelements_riscv32m2(
122122
// RISCV: [[VSCALE:%.+]] = call i64 @llvm.vscale.i64()
123-
// RISCV: [[RES:%.+]] = mul i64 [[VSCALE]], 4
123+
// RISCV: [[RES:%.+]] = mul nuw i64 [[VSCALE]], 4
124124
// RISCV: ret i64 [[RES]]
125125
return __builtin_vectorelements(vuint32m2_t);
126126
}

‎llvm/include/llvm/IR/IRBuilder.h‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -965,11 +965,13 @@ class IRBuilderBase {
965965
}
966966

967967
/// Create an expression which evaluates to the number of elements in \p EC
968-
/// at runtime.
968+
/// at runtime. This can result in poison if type \p Ty is not big enough to
969+
/// hold the value.
969970
LLVM_ABI Value *CreateElementCount(Type *Ty, ElementCount EC);
970971

971972
/// Create an expression which evaluates to the number of units in \p Size
972-
/// at runtime. This works for both units of bits and bytes.
973+
/// at runtime. This works for both units of bits and bytes. This can result
974+
/// in poison if type \p Ty is not big enough to hold the value.
973975
LLVM_ABI Value *CreateTypeSize(Type *Ty, TypeSize Size);
974976

975977
/// Creates a vector of type \p DstType with the linear sequence <0, 1, ...>

‎llvm/lib/IR/IRBuilder.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -117,7 +117,7 @@ static Value *CreateVScaleMultiple(IRBuilderBase &B, Type *Ty, uint64_t Scale) {
117117
if (Scale == 1)
118118
return VScale;
119119

120-
return B.CreateMul(VScale, ConstantInt::get(Ty, Scale));
120+
return B.CreateNUWMul(VScale, ConstantInt::get(Ty, Scale));
121121
}
122122

123123
Value *IRBuilderBase::CreateElementCount(Type *Ty, ElementCount EC) {

‎llvm/test/Analysis/ValueTracking/phi-known-bits.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -936,7 +936,7 @@ define i1 @recursiveGEP_withPtrSub_scalableGEP(ptr %val1) {
936936
; CHECK: while.cond.i:
937937
; CHECK-NEXT: [[A_PN_I:%.*]] = phi ptr [ [[TEST_0_I:%.*]], [[WHILE_COND_I]] ], [ [[VAL1:%.*]], [[ENTRY:%.*]] ]
938938
; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
939-
; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 4
939+
; CHECK-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 4
940940
; CHECK-NEXT: [[TEST_0_I]] = getelementptr i8, ptr [[A_PN_I]], i64 [[TMP1]]
941941
; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[TEST_0_I]], align 1
942942
; CHECK-NEXT: [[CMP3_NOT_I:%.*]] = icmp eq i8 [[TMP2]], 0
@@ -970,7 +970,7 @@ define i1 @recursiveGEP_withPtrSub_scalableGEP_inbounds(ptr %val1) {
970970
; CHECK: while.cond.i:
971971
; CHECK-NEXT: [[A_PN_I:%.*]] = phi ptr [ [[TEST_0_I:%.*]], [[WHILE_COND_I]] ], [ [[VAL1:%.*]], [[ENTRY:%.*]] ]
972972
; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
973-
; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 4
973+
; CHECK-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 4
974974
; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds i8, ptr [[A_PN_I]], i64 [[TMP1]]
975975
; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[TEST_0_I]], align 1
976976
; CHECK-NEXT: [[CMP3_NOT_I:%.*]] = icmp eq i8 [[TMP2]], 0

‎llvm/test/Instrumentation/AddressSanitizer/asan-masked-load-store.ll‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -315,7 +315,7 @@ declare void @llvm.masked.store.nxv4f32.p0(<vscale x 4 x float>, ptr, i32, <vsca
315315
define <vscale x 4 x float> @scalable.load.nxv4f32(ptr %p, <vscale x 4 x i1> %mask) sanitize_address {
316316
; CHECK-LABEL: @scalable.load.nxv4f32(
317317
; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
318-
; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], 4
318+
; CHECK-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
319319
; CHECK-NEXT: br label [[DOTSPLIT:%.*]]
320320
; CHECK: .split:
321321
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[TMP0:%.*]] ], [ [[IV_NEXT:%.*]], [[TMP7:%.*]] ]
@@ -345,7 +345,7 @@ define <vscale x 4 x float> @scalable.load.nxv4f32(ptr %p, <vscale x 4 x i1> %ma
345345
define void @scalable.store.nxv4f32(ptr %p, <vscale x 4 x float> %arg, <vscale x 4 x i1> %mask) sanitize_address {
346346
; CHECK-LABEL: @scalable.store.nxv4f32(
347347
; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
348-
; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], 4
348+
; CHECK-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
349349
; CHECK-NEXT: br label [[DOTSPLIT:%.*]]
350350
; CHECK: .split:
351351
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[TMP0:%.*]] ], [ [[IV_NEXT:%.*]], [[TMP7:%.*]] ]
@@ -379,7 +379,7 @@ declare void @llvm.masked.scatter.nxv4f32.nxv4p0(<vscale x 4 x float>, <vscale x
379379
define <vscale x 4 x float> @scalable.gather.nxv4f32(<vscale x 4 x ptr> %vp, <vscale x 4 x i1> %mask, i32 %evl) sanitize_address {
380380
; CHECK-LABEL: @scalable.gather.nxv4f32(
381381
; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
382-
; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], 4
382+
; CHECK-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
383383
; CHECK-NEXT: br label [[DOTSPLIT:%.*]]
384384
; CHECK: .split:
385385
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[TMP0:%.*]] ], [ [[IV_NEXT:%.*]], [[TMP7:%.*]] ]
@@ -409,7 +409,7 @@ define <vscale x 4 x float> @scalable.gather.nxv4f32(<vscale x 4 x ptr> %vp, <vs
409409
define void @scalable.scatter.nxv4f32(<vscale x 4 x float> %val, <vscale x 4 x ptr> %vp, <vscale x 4 x i1> %mask, i32 %evl) sanitize_address {
410410
; CHECK-LABEL: @scalable.scatter.nxv4f32(
411411
; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
412-
; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], 4
412+
; CHECK-NEXT: [[TMP2:%.*]] = mul nuw i64 [[TMP1]], 4
413413
; CHECK-NEXT: br label [[DOTSPLIT:%.*]]
414414
; CHECK: .split:
415415
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[TMP0:%.*]] ], [ [[IV_NEXT:%.*]], [[TMP7:%.*]] ]
@@ -447,7 +447,7 @@ define <vscale x 4 x float> @scalable.expandload.nxv4f32(ptr align 4 %p, <vscale
447447
; CHECK-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP13:%.*]]
448448
; CHECK: 4:
449449
; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
450-
; CHECK-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 4
450+
; CHECK-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 4
451451
; CHECK-NEXT: [[TMP7:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP2]], i64 [[TMP6]])
452452
; CHECK-NEXT: br label [[DOTSPLIT:%.*]]
453453
; CHECK: .split:
@@ -485,7 +485,7 @@ define void @scalable.compressstore.nxv4f32(ptr align 4 %p, <vscale x 4 x float>
485485
; CHECK-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP13:%.*]]
486486
; CHECK: 4:
487487
; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
488-
; CHECK-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 4
488+
; CHECK-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 4
489489
; CHECK-NEXT: [[TMP7:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP2]], i64 [[TMP6]])
490490
; CHECK-NEXT: br label [[DOTSPLIT:%.*]]
491491
; CHECK: .split:

‎llvm/test/Instrumentation/AddressSanitizer/asan-vp-load-store.ll‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -255,7 +255,7 @@ define <vscale x 4 x float> @scalable.load.nxv4f32(ptr align 4 %p, <vscale x 4 x
255255
; CHECK: 2:
256256
; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[EVL]] to i64
257257
; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
258-
; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4
258+
; CHECK-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
259259
; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP3]], i64 [[TMP5]])
260260
; CHECK-NEXT: br label [[DOTSPLIT:%.*]]
261261
; CHECK: .split:
@@ -292,7 +292,7 @@ define void @scalable.store.nxv4f32(ptr align 4 %p, <vscale x 4 x float> %arg, <
292292
; CHECK: 2:
293293
; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[EVL]] to i64
294294
; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
295-
; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4
295+
; CHECK-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
296296
; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP3]], i64 [[TMP5]])
297297
; CHECK-NEXT: br label [[DOTSPLIT:%.*]]
298298
; CHECK: .split:
@@ -333,7 +333,7 @@ define <vscale x 4 x float> @scalable.strided.load.nxv4f32(ptr align 4 %p, i32 %
333333
; CHECK: 2:
334334
; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[EVL]] to i64
335335
; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
336-
; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4
336+
; CHECK-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
337337
; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP3]], i64 [[TMP5]])
338338
; CHECK-NEXT: [[TMP7:%.*]] = zext i32 [[STRIDE:%.*]] to i64
339339
; CHECK-NEXT: br label [[DOTSPLIT:%.*]]
@@ -372,7 +372,7 @@ define void @scalable.strided.store.nxv4f32(<vscale x 4 x float> %arg, ptr align
372372
; CHECK: 2:
373373
; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[EVL]] to i64
374374
; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
375-
; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4
375+
; CHECK-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
376376
; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP3]], i64 [[TMP5]])
377377
; CHECK-NEXT: [[TMP7:%.*]] = zext i32 [[STRIDE:%.*]] to i64
378378
; CHECK-NEXT: br label [[DOTSPLIT:%.*]]
@@ -412,7 +412,7 @@ define <vscale x 4 x float> @scalable.strided.load.nxv4f32.align(ptr align 4 %p,
412412
; CHECK: 2:
413413
; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[EVL]] to i64
414414
; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
415-
; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4
415+
; CHECK-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
416416
; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP3]], i64 [[TMP5]])
417417
; CHECK-NEXT: br label [[DOTSPLIT:%.*]]
418418
; CHECK: .split:
@@ -454,7 +454,7 @@ define <vscale x 4 x float> @scalable.gather.nxv4f32(<vscale x 4 x ptr> %vp, <vs
454454
; CHECK: 2:
455455
; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[EVL]] to i64
456456
; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
457-
; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4
457+
; CHECK-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
458458
; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP3]], i64 [[TMP5]])
459459
; CHECK-NEXT: br label [[DOTSPLIT:%.*]]
460460
; CHECK: .split:
@@ -491,7 +491,7 @@ define void @scalable.scatter.nxv4f32(<vscale x 4 x float> %arg, <vscale x 4 x p
491491
; CHECK: 2:
492492
; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[EVL]] to i64
493493
; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
494-
; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4
494+
; CHECK-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP4]], 4
495495
; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP3]], i64 [[TMP5]])
496496
; CHECK-NEXT: br label [[DOTSPLIT:%.*]]
497497
; CHECK: .split:

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