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1 | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
2 | 2 | /* |
3 | | - * Copyright (c) 2022 Rockchip Electronics Co., Ltd. |
4 | | - * Copyright (c) 2022 Radxa Limited |
| 3 | + * Copyright (c) 2024 Rockchip Electronics Co., Ltd. |
| 4 | + * Copyright (c) 2024 Radxa Computer (Shenzhen) Co., Ltd. |
5 | 5 | * |
6 | 6 | */ |
7 | 7 |
|
|
26 | 26 |
|
27 | 27 | /delete-node/ chosen; |
28 | 28 |
|
| 29 | + fan0: pwm-fan { |
| 30 | + compatible = "pwm-fan"; |
| 31 | + #cooling-cells = <2>; |
| 32 | + cooling-levels = <0 64 128 192 255>; |
| 33 | + pwms = <&pwm1 0 60000 0>; |
| 34 | + }; |
| 35 | + |
29 | 36 | vcc12v_dcin: vcc12v-dcin { |
30 | 37 | compatible = "regulator-fixed"; |
31 | 38 | regulator-name = "vcc12v_dcin"; |
|
45 | 52 | vin-supply = <&vcc12v_dcin>; |
46 | 53 | }; |
47 | 54 |
|
48 | | - wifi_disable: wifi-diable-gpio-regulator { |
| 55 | + bt_wake: bt-wake-gpio-regulator { |
49 | 56 | compatible = "regulator-fixed"; |
50 | | - regulator-name = "wifi_disable"; |
| 57 | + regulator-name = "bt_wake"; |
51 | 58 | enable-active-high; |
52 | | - gpio = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; |
| 59 | + gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; |
53 | 60 | regulator-boot-on; |
54 | 61 | regulator-always-on; |
55 | 62 | }; |
56 | 63 |
|
57 | | - bt_wake: bt-wake-gpio-regulator { |
| 64 | + wifi_disable: wifi-diable-gpio-regulator { |
58 | 65 | compatible = "regulator-fixed"; |
59 | | - regulator-name = "bt_wake"; |
| 66 | + regulator-name = "wifi_disable"; |
60 | 67 | enable-active-high; |
61 | | - gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; |
| 68 | + gpio = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; |
62 | 69 | regulator-boot-on; |
63 | 70 | regulator-always-on; |
64 | 71 | }; |
|
114 | 121 | dp0_sound: dp0-sound { |
115 | 122 | status = "okay"; |
116 | 123 | compatible = "rockchip,hdmi"; |
117 | | - rockchip,card-name = "rockchip-dp0"; |
| 124 | + rockchip,card-name= "rockchip-hdmi2"; |
118 | 125 | rockchip,mclk-fs = <512>; |
119 | 126 | rockchip,cpu = <&spdif_tx2>; |
120 | 127 | rockchip,codec = <&dp0 1>; |
|
127 | 134 | rockchip,card-name = "rockchip-es8316"; |
128 | 135 | rockchip,format = "i2s"; |
129 | 136 | rockchip,mclk-fs = <256>; |
130 | | - rockchip,cpu = <&i2s0_8ch >; |
| 137 | + rockchip,cpu = <&i2s0_8ch>; |
131 | 138 | rockchip,codec = <&es8316>; |
132 | 139 | poll-interval = <100>; |
133 | 140 | io-channels = <&saradc 3>; |
|
146 | 153 | vcc5v0_host: vcc5v0-host-regulator { |
147 | 154 | compatible = "regulator-fixed"; |
148 | 155 | regulator-name = "vcc5v0_host"; |
149 | | - regulator-boot-on; |
150 | | - regulator-always-on; |
151 | 156 | regulator-min-microvolt = <5000000>; |
152 | 157 | regulator-max-microvolt = <5000000>; |
153 | 158 | enable-active-high; |
|
190 | 195 | vin-supply = <&vcc5v0_sys>; |
191 | 196 | }; |
192 | 197 |
|
193 | | - gpio-leds { |
194 | | - compatible = "gpio-leds"; |
195 | | - pinctrl-names = "default"; |
196 | | - |
197 | | - user-led2 { |
198 | | - gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; |
199 | | - linux,default-trigger = "heartbeat"; |
200 | | - default-state = "on"; |
201 | | - }; |
202 | | - }; |
203 | | - |
204 | 198 | /* If hdmirx node is disabled, delete the reserved-memory node here. */ |
205 | 199 | reserved-memory { |
206 | 200 | #address-cells = <2>; |
|
217 | 211 | }; |
218 | 212 |
|
219 | 213 | hdmiin-sound { |
| 214 | + status = "okay"; |
220 | 215 | compatible = "rockchip,hdmi"; |
221 | 216 | rockchip,mclk-fs = <128>; |
222 | 217 | rockchip,format = "i2s"; |
223 | 218 | rockchip,bitclock-master = <&hdmirx_ctrler>; |
224 | 219 | rockchip,frame-master = <&hdmirx_ctrler>; |
225 | | - rockchip,card-name = "rockchip-hdmiin"; |
| 220 | + rockchip,card-name = "rockchip,hdmiin"; |
226 | 221 | rockchip,cpu = <&i2s7_8ch>; |
227 | 222 | rockchip,codec = <&hdmirx_ctrler 0>; |
228 | 223 | rockchip,jack-det; |
229 | 224 | }; |
230 | 225 |
|
231 | | - fan0: pwm-fan { |
232 | | - compatible = "pwm-fan"; |
233 | | - #cooling-cells = <2>; |
234 | | - cooling-levels = <72 94 117 139 162 184 207 229 255>; |
235 | | - pwms = <&pwm1 0 10000 0>; |
| 226 | + gpio-leds { |
| 227 | + compatible = "gpio-leds"; |
| 228 | + pinctrl-names = "default"; |
| 229 | + |
| 230 | + user-led2 { |
| 231 | + gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; |
| 232 | + linux,default-trigger = "heartbeat"; |
| 233 | + default-state = "on"; |
| 234 | + }; |
236 | 235 | }; |
237 | 236 | }; |
238 | 237 |
|
|
244 | 243 | status = "okay"; |
245 | 244 | }; |
246 | 245 |
|
247 | | -&avsd { |
248 | | - status = "okay"; |
249 | | -}; |
250 | | - |
251 | 246 | &cpu_l0 { |
252 | 247 | cpu-supply = <&vdd_cpu_lit_s0>; |
253 | 248 | mem-supply = <&vdd_cpu_lit_mem_s0>; |
|
489 | 484 | max-frequency = <200000000>; |
490 | 485 | mmc-hs400-1_8v; |
491 | 486 | mmc-hs400-enhanced-strobe; |
| 487 | + mmc-hs200-1_8v; |
492 | 488 | status = "okay"; |
493 | 489 | }; |
494 | 490 |
|
|
639 | 635 | &display_subsystem { |
640 | 636 | clocks = <&hdptxphy_hdmi0>, <&hdptxphy_hdmi1>; |
641 | 637 | clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll"; |
642 | | - |
643 | | - route { |
644 | | - route_hdmi0: route-hdmi0 { |
645 | | - status = "okay"; |
646 | | - logo,uboot = "logo.bmp"; |
647 | | - logo,kernel = "logo_kernel.bmp"; |
648 | | - logo,mode = "center"; |
649 | | - charge_logo,mode = "center"; |
650 | | - connect = <&vp0_out_hdmi0>; |
651 | | - }; |
652 | | - |
653 | | - route_hdmi1: route-hdmi1 { |
654 | | - status = "okay"; |
655 | | - logo,uboot = "logo.bmp"; |
656 | | - logo,kernel = "logo_kernel.bmp"; |
657 | | - logo,mode = "center"; |
658 | | - charge_logo,mode = "center"; |
659 | | - connect = <&vp1_out_hdmi1>; |
660 | | - }; |
661 | | - }; |
662 | 638 | }; |
663 | 639 |
|
664 | 640 | &hdptxphy_hdmi0 { |
|
671 | 647 |
|
672 | 648 | &hdmi0 { |
673 | 649 | status = "okay"; |
674 | | - cec-enable = "true"; |
| 650 | + cec-enable = "true"; |
| 651 | + enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; |
675 | 652 | }; |
676 | 653 |
|
677 | 654 | &hdmi0_in_vp0 { |
|
694 | 671 | status = "okay"; |
695 | 672 | pinctrl-names = "default"; |
696 | 673 | pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd &hdmim1_tx1_scl &hdmim1_tx1_sda>; |
697 | | - cec-enable = "true"; |
| 674 | + cec-enable = "true"; |
| 675 | + enable-gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>; |
698 | 676 | }; |
699 | 677 |
|
700 | 678 | &hdmi1_in_vp0 { |
|
713 | 691 | status = "okay"; |
714 | 692 | }; |
715 | 693 |
|
| 694 | +&hdptxphy_hdmi0 { |
| 695 | + status = "okay"; |
| 696 | +}; |
| 697 | + |
| 698 | +&hdptxphy_hdmi1 { |
| 699 | + status = "okay"; |
| 700 | +}; |
| 701 | + |
716 | 702 | /* Should work with at least 128MB cma reserved above. */ |
717 | 703 | &hdmirx_ctrler { |
718 | 704 | status = "okay"; |
719 | 705 |
|
720 | | - #sound-dai-cells = <1>; |
721 | 706 | /* Effective level used to trigger HPD: 0-low, 1-high */ |
722 | 707 | hpd-trigger-level = <1>; |
723 | 708 | hdmirx-det-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>; |
724 | | - |
725 | 709 | pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_det>; |
726 | 710 | pinctrl-names = "default"; |
727 | | -}; |
728 | | - |
729 | | -&hdptxphy_hdmi0 { |
730 | | - status = "okay"; |
731 | | -}; |
732 | | - |
733 | | -&hdptxphy_hdmi1 { |
734 | | - status = "okay"; |
| 711 | + #sound-dai-cells = <1>; |
735 | 712 | }; |
736 | 713 |
|
737 | 714 | &i2s5_8ch { |
|
832 | 809 | }; |
833 | 810 |
|
834 | 811 | &u2phy1_otg { |
| 812 | + vbus-supply = <&vcc5v0_host>; |
835 | 813 | status = "okay"; |
836 | 814 | }; |
837 | 815 |
|
|
1058 | 1036 | reg = <0x11>; |
1059 | 1037 | clocks = <&mclkout_i2s0>; |
1060 | 1038 | clock-names = "mclk"; |
| 1039 | + assigned-clocks = <&mclkout_i2s0>; |
| 1040 | + assigned-clock-rates = <12288000>; |
1061 | 1041 | pinctrl-names = "default"; |
1062 | 1042 | pinctrl-0 = <&i2s0_mclk>; |
1063 | 1043 | #sound-dai-cells = <0>; |
|
1071 | 1051 | #sound-dai-cells = <0>; |
1072 | 1052 | pinctrl-names = "default"; |
1073 | 1053 | pinctrl-0 = <&i2s0_lrck |
1074 | | - &i2s0_sclk |
1075 | | - &i2s0_sdi0 |
1076 | | - &i2s0_sdo0>; |
1077 | | -}; |
1078 | | - |
1079 | | -&sfc { |
1080 | | - status = "okay"; |
1081 | | - max-freq = <50000000>; |
1082 | | - #address-cells = <1>; |
1083 | | - #size-cells = <0>; |
1084 | | - pinctrl-names = "default"; |
1085 | | - pinctrl-0 = <&fspim2_pins>; |
1086 | | - |
1087 | | - spi_flash: spi-flash@0 { |
1088 | | - #address-cells = <1>; |
1089 | | - #size-cells = <0>; |
1090 | | - compatible = "jedec,spi-nor"; |
1091 | | - reg = <0x0>; |
1092 | | - spi-max-frequency = <50000000>; |
1093 | | - spi-tx-bus-width = <1>; |
1094 | | - spi-rx-bus-width = <4>; |
1095 | | - status = "okay"; |
1096 | | - |
1097 | | - partitions { |
1098 | | - compatible = "fixed-partitions"; |
1099 | | - #address-cells = <1>; |
1100 | | - #size-cells = <1>; |
1101 | | - |
1102 | | - loader@0 { |
1103 | | - label = "loader"; |
1104 | | - reg = <0x0 0x1000000>; |
1105 | | - }; |
1106 | | - }; |
1107 | | - }; |
| 1054 | + &i2s0_sclk |
| 1055 | + &i2s0_sdi0 |
| 1056 | + &i2s0_sdo0>; |
1108 | 1057 | }; |
1109 | 1058 |
|
1110 | 1059 | &rockchip_suspend { |
|
1166 | 1115 | }; |
1167 | 1116 | }; |
1168 | 1117 |
|
| 1118 | +&sfc { |
| 1119 | + status = "okay"; |
| 1120 | + max-freq = <50000000>; |
| 1121 | + #address-cells = <1>; |
| 1122 | + #size-cells = <0>; |
| 1123 | + pinctrl-names = "default"; |
| 1124 | + pinctrl-0 = <&fspim2_pins>; |
| 1125 | + |
| 1126 | + spi_flash: spi-flash@0 { |
| 1127 | + #address-cells = <1>; |
| 1128 | + #size-cells = <0>; |
| 1129 | + compatible = "jedec,spi-nor"; |
| 1130 | + reg = <0x0>; |
| 1131 | + spi-max-frequency = <50000000>; |
| 1132 | + spi-tx-bus-width = <1>; |
| 1133 | + spi-rx-bus-width = <4>; |
| 1134 | + status = "okay"; |
| 1135 | + |
| 1136 | + partitions { |
| 1137 | + compatible = "fixed-partitions"; |
| 1138 | + #address-cells = <1>; |
| 1139 | + #size-cells = <1>; |
| 1140 | + |
| 1141 | + loader@0 { |
| 1142 | + label = "loader"; |
| 1143 | + reg = <0x0 0x1000000>; |
| 1144 | + }; |
| 1145 | + }; |
| 1146 | + }; |
| 1147 | +}; |
| 1148 | + |
1169 | 1149 | &pinctrl { |
1170 | 1150 | usb { |
1171 | 1151 | vcc5v0_host_en: vcc5v0-host-en { |
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