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Add Blueberry R58 HD3 device trees
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arch/arm64/boot/dts/rockchip/Makefile

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@@ -245,6 +245,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-edge-v12-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-edge-v12-maizhuo-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-edge-v14-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-minipc-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-r58-hd3-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-minipc-mizhuo-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568m-serdes-evb-camera-csi-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568m-serdes-evb-camera-dvp-v10.dtb
@@ -449,3 +450,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-tablet-v11.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-luckfox-core3566.dtb
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subdir-y := $(dts-dirs) overlay
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# Armbian: Incremental: assuming overlay targets are already in the Makefile
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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#include "rk3588-blueberry-r58-hd3.dtsi"
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#include "rk3588-linux.dtsi"
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#include "rk3588-blueberry-r58-hd3-rk628-hdmi2csi.dtsi"
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/ {
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model = "RK3588 R58-HD Board";
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compatible = "rockchip,rk3588-R58-HD-v10-linux", "rockchip,rk3588";
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/delete-node/ chosen;
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fan{
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compatible = "pwm-fan";
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#cooling-cells = <2>;
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pwms = <&pwm5 0 50000 0>;
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cooling-levels = <0 50 100 150 200 255>;
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rockchip,temp-trips = <
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60000 1
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65000 2
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70000 3
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75000 4
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80000 5
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>;
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enable-gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&fan_enable_gpio>;
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};
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//软件保留
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backlight_mipi0: backlight_mipi0 {
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compatible = "pwm-backlight";
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pwms = <&pwm9 0 25000 0>;
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brightness-levels = <
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0 20 20 21 21 22 22 23
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>;
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default-brightness-level = <2>;
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};
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//软件保留
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backlight_mipi1: backlight_mipi1 {
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compatible = "pwm-backlight";
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pwms = <&pwm15 0 25000 0>;
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brightness-levels = <
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0 20 20 21 21 22 22 23
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>;
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default-brightness-level = <2>;
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};
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&can1m1_pins>;
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status = "okay";
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};
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//风扇
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&pwm4 {
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pinctrl-0 = <&pwm4m0_pins>;
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status = "disabled";
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};
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&pwm5 {
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pinctrl-0 = <&pwm5m1_pins>;
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status = "okay";
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};
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//mipi0
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&pwm9 {
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pinctrl-0 = <&pwm9m0_pins>;
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status = "okay";
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};
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//mipi1
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&pwm15 {
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pinctrl-0 = <&pwm15m2_pins>;
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status = "okay";
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};
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#if 1
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&dsi0 {
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status = "okay";
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//rockchip,lane-rate = <120>;
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dsi0_panel: panel@0 {
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status = "okay";
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compatible = "simple-panel-dsi";
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reg = <0>;
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backlight = <&backlight_mipi0>;
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//power-supply = <&vcc3v3_mipi_lcd_power>;
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reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>;
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//enable-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
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reset-delay-ms = <100>;
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enable-delay-ms = <10>;
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init-delay-ms = <100>;
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prepare-delay-ms = <100>;
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unprepare-delay-ms = <10>;
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disable-delay-ms = <60>;
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dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
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MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET)>;
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dsi,format = <MIPI_DSI_FMT_RGB888>;
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dsi,lanes = <4>;
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panel-init-sequence = [
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05 78 01 11
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05 78 01 29
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];
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panel-exit-sequence = [
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05 00 01 28
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05 00 01 10
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];
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display-timings {
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native-mode = <&timing0>;
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timing0: timing0 {
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clock-frequency = <148500000>;
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hactive = <1920>;
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vactive = <1080>;
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hback-porch = <148>;
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hfront-porch = <88>;
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hsync-len = <44>;
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vback-porch = <36>;
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vfront-porch = <4>;
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vsync-len = <5>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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panel_in_dsi0: endpoint {
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remote-endpoint = <&dsi0_out_panel>;
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};
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};
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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dsi0_out_panel: endpoint {
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remote-endpoint = <&panel_in_dsi0>;
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};
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};
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};
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};
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&mipi_dcphy0 {
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status = "okay";
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};
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&dsi0_in_vp2 {
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status = "okay";
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};
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&dsi0_in_vp3 {
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status = "disabled";
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};
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&route_dsi0 {
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status = "disabled";
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connect = <&vp2_out_dsi0>;
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};
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#endif
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#if 1
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&dsi1 {
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status = "okay";
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//rockchip,lane-rate = <120>;
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dsi1_panel: panel@1 {
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status = "okay";
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compatible = "simple-panel-dsi";
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reg = <0>;
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backlight = <&backlight_mipi1>;
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//power-supply = <&vcc3v3_mipi_lcd_power>;
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reset-gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
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//enable-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
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reset-delay-ms = <100>;
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enable-delay-ms = <10>;
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init-delay-ms = <100>;
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prepare-delay-ms = <100>;
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unprepare-delay-ms = <10>;
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disable-delay-ms = <60>;
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dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
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MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET)>;
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dsi,format = <MIPI_DSI_FMT_RGB888>;
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dsi,lanes = <4>;
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panel-init-sequence = [
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05 78 01 11
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05 78 01 29
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];
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panel-exit-sequence = [
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05 00 01 28
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05 00 01 10
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];
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display-timings {
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native-mode = <&timing1>;
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timing1: timing1 {
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clock-frequency = <148500000>;
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hactive = <1920>;
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vactive = <1080>;
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hback-porch = <148>;
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hfront-porch = <88>;
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hsync-len = <44>;
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vback-porch = <36>;
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vfront-porch = <4>;
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vsync-len = <5>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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panel_in_dsi1: endpoint {
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remote-endpoint = <&dsi0_out_panel1>;
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};
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};
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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dsi0_out_panel1: endpoint {
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remote-endpoint = <&panel_in_dsi1>;
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};
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};
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};
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};
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&mipi_dcphy1 {
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status = "okay";
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};
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&dsi1_in_vp3 {
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status = "okay";
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};
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&route_dsi1 {
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status = "disabled";
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connect = <&vp3_out_dsi1>;
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};
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#endif
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&pinctrl {
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lt9611 {
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lt9611_reset_gpios: lt9611reset-gpios {
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rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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fan_enable_gpio { //v10-1 V09 GPIO0_A0 控制风扇
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fan_enable_gpio: fan_enable_gpio{
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rockchip,pins =
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<3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&sdmmc_pwr {
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rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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&vcc_sd {
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compatible = "regulator-fixed";
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gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_pwr>;
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regulator-always-on;
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regulator-boot-on;
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enable-active-high;
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regulator-name = "vcc_sd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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startup-delay-us = <100000>;
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vin-supply = <&vcc12v_dcin>;
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};
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&gmac0 {
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snps,reset-gpio = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
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};
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//v10-2 V09版本 GPIO0_C5 作为4G 唤醒口
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&DP0_HPDIN_gpio{
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rockchip,pins =
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<0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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&dp0 {
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pinctrl-names = "default";
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pinctrl-0 = <&DP0_HPDIN_gpio>;
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hpd-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
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split-mode;
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status = "okay";
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};
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&lt6911_sound {
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compatible;
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simple-audio-card,format = "i2s";
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simple-audio-card,name = "rockchip,lt6911";
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simple-audio-card,bitclock-master ;
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simple-audio-card,frame-master ;
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status = "disabled";
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simple-audio-card,cpu {
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sound-dai ;
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};
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dailink1_master: simple-audio-card,codec {
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sound-dai ;
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};
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};

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