1+ // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2+ /*
3+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
4+ *
5+ */
6+
7+ #include "dt-bindings/usb/pd.h"
8+
9+ /* lt6911 01 hdmi in */
10+ / {
11+ lt6911_1_dc: lt6911-1-dc {
12+ compatible = "rockchip,dummy-codec";
13+ #sound-dai-cells = <0>;
14+ };
15+
16+ lt6911_01-sound {
17+ compatible = "simple-audio-card";
18+ simple-audio-card,format = "i2s";
19+ simple-audio-card,name = "rockchip,lt6911-01";
20+ simple-audio-card,bitclock-master = <&dailink1_master>;
21+ simple-audio-card,frame-master = <&dailink1_master>;
22+ status = "okay";
23+ simple-audio-card,cpu {
24+ sound-dai = <&i2s2_2ch>;
25+ };
26+ dailink1_master: simple-audio-card,codec {
27+ sound-dai = <<6911_1_dc>;
28+ };
29+ };
30+ };
31+
32+
33+ &i2s2_2ch {
34+ status = "okay";
35+ pinctrl-0 = <&i2s2m1_sdi>;
36+ rockchip,clk-trcm = <1>;
37+ };
38+
39+ &mipi1_csi2 {
40+ status = "okay";
41+
42+ ports {
43+ #address-cells = <1>;
44+ #size-cells = <0>;
45+
46+ port@0 {
47+ reg = <0>;
48+ #address-cells = <1>;
49+ #size-cells = <0>;
50+
51+ mipi1_csi2_input: endpoint@1 {
52+ reg = <1>;
53+ remote-endpoint = <&csidphy1_out>;
54+ };
55+ };
56+
57+ port@1 {
58+ reg = <1>;
59+ #address-cells = <1>;
60+ #size-cells = <0>;
61+
62+ mipi1_csi2_output: endpoint@0 {
63+ reg = <0>;
64+ remote-endpoint = <&cif_mipi1_in0>;
65+ };
66+ };
67+ };
68+ };
69+
70+ &csi2_dcphy1 {
71+ status = "okay";
72+
73+ ports {
74+ #address-cells = <1>;
75+ #size-cells = <0>;
76+ port@0 {
77+ reg = <0>;
78+ #address-cells = <1>;
79+ #size-cells = <0>;
80+
81+ mipi_1_in_lt6911: endpoint@1 {
82+ reg = <1>;
83+ remote-endpoint = <<6911_1_out>;
84+ data-lanes = <1 2 3 4>;
85+ };
86+ };
87+ port@1 {
88+ reg = <1>;
89+ #address-cells = <1>;
90+ #size-cells = <0>;
91+
92+ csidphy1_out: endpoint@0 {
93+ reg = <0>;
94+ remote-endpoint = <&mipi1_csi2_input>;
95+ };
96+ };
97+ };
98+ };
99+
100+ &mipi_dcphy1 {
101+ status = "okay";
102+ };
103+
104+ &i2c4 {
105+ pinctrl-names = "default";
106+ pinctrl-0 = <&i2c4m0_xfer>;
107+ status = "okay";
108+
109+ lt6911_1:lt6911_1@2b {
110+ compatible = "lontium,lt6911uxe";
111+ status = "okay";
112+ reg = <0x2b>;
113+ clocks = <&ext_cam_clk>;
114+ clock-names = "xvclk";
115+ power-domains = <&power RK3588_PD_VI>;
116+ pinctrl-names = "default";
117+ pinctrl-0 = <<6911uxc_1_pin>;
118+ interrupt-parent = <&gpio4>;
119+ interrupts = <RK_PB3 IRQ_TYPE_LEVEL_LOW>;
120+ //power-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
121+ reset-gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
122+ plugin-det-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>;
123+ rockchip,camera-module-index = <0>;
124+ rockchip,camera-module-facing = "back";
125+ rockchip,camera-module-name = "HDMI-MIPI2";
126+ rockchip,camera-module-lens-name = "LT6911UXE";
127+ port {
128+ lt6911_1_out: endpoint {
129+ remote-endpoint = <&mipi_1_in_lt6911>;
130+ data-lanes = <1 2 3 4>;
131+ };
132+ };
133+ };
134+ };
135+
136+
137+ &rkcif_mipi_lvds1 {
138+ status = "okay";
139+
140+ port {
141+ cif_mipi1_in0: endpoint {
142+ remote-endpoint = <&mipi1_csi2_output>;
143+ };
144+ };
145+ };
146+
147+ &rkcif_mipi_lvds1_sditf {
148+ status = "okay";
149+
150+ port {
151+ mipi_lvds1_sditf: endpoint {
152+ remote-endpoint = <&isp0_vir1>;
153+ };
154+ };
155+ };
156+
157+ &rkisp0_vir1 {
158+ status = "okay";
159+
160+ port {
161+ #address-cells = <1>;
162+ #size-cells = <0>;
163+
164+ isp0_vir1: endpoint@0 {
165+ reg = <0>;
166+ remote-endpoint = <&mipi_lvds1_sditf>;
167+ };
168+ };
169+ };
170+
171+ /* lt6911 01 hdmi in end*/
172+
173+ &rkcif {
174+ status = "okay";
175+ };
176+
177+ &rkcif_mmu {
178+ status = "okay";
179+ };
180+
181+ &rkisp0 {
182+ status = "okay";
183+ };
184+
185+ &isp0_mmu {
186+ status = "okay";
187+ };
188+
189+ &pinctrl {
190+ hdmiin {
191+ lt6911uxc_1_pin: lt6911uxc-1-pin {
192+ rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,// HDMIRX_DET_LT6911
193+ <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, // LT6911UXC_INT
194+ <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; // LT6911_RST
195+ };
196+ };
197+ };
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