Patch OpenSSL 3.5 to hardcode the vlenb CSR address on RISC-V

Our GCC version doesn't know it, so replace the `vlenb` variable with
`0xc22`. See openssl/openssl#23011.

Author: Edward-Knight

cpython-unix/build-openssl-3.5.sh

@@ -13,6 +13,12 @@ tar -xf openssl-${OPENSSL_3_5_VERSION}.tar.gz
 
 pushd openssl-${OPENSSL_3_5_VERSION}
 
+# hardcode the vlenb CSR address (0xc22) as our GCC version doesn't know it
+# https://github.com/riscv/riscv-isa-manual/blob/c001fa237cdd8b6079384044462a89eb0e3fd9cf/src/v-st-ext.adoc?plain=1#L74
+if [[ "${TARGET_TRIPLE}" = "riscv64-unknown-linux-gnu" ]]; then
+    patch -p1 -i "${ROOT}/patch-openssl-3.5-riscv-vlenb-register.patch"
+fi
+
 # Otherwise it gets set to /tools/deps/ssl by default.
 case "${TARGET_TRIPLE}" in
     *apple*)

cpython-unix/patch-openssl-3.5-riscv-vlenb-register.patch

@@ -0,0 +1,15 @@
+diff --git a/crypto/riscv64cpuid.pl b/crypto/riscv64cpuid.pl
+index 5dcdc5c584..7751ad50d9 100644
+--- a/crypto/riscv64cpuid.pl
++++ b/crypto/riscv64cpuid.pl
+@@ -94,8 +94,8 @@ $code .= <<___;
+ .globl riscv_vlen_asm
+ .type riscv_vlen_asm,\@function
+ riscv_vlen_asm:
+-    csrr $ret, vlenb
+-    slli $ret, $ret, 3
++    csrr a0, 0xc22
++    slli a0, a0, 3
+     ret
+ .size riscv_vlen_asm,.-riscv_vlen_asm
+ ___