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u54-prci: driver for core U54 clocks
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SiFive U54 SoC clocks
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This binding uses the common clock binding:
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Documentation/devicetree/bindings/clock/clock-bindings.txt
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The U54 PRCI controller generates clocks for the U54 SoC. There is
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a core PLL that sets the processor frequency and PLLs for ethernet
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and DDR. It takes an input clock from the board, typically an oscillator
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or crystal.
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Required properties:
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- compatible: Should be "sifive,aloeprci0"
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- #clock-cells: Should be <1>
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- reg: Specifies base physical address and size of the registers
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- clocks: phandles to the parent clock used as input
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Example:
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refclk: refclk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <33333333>;
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clock-output-names = "xtal";
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};
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u54: prci@10000000 {
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compatible = "sifive,aloeprci0";
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reg = <0x0 0x10000000 0x0 0x1000>;
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clocks = <&refclk>;
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#clock-cells = <1>;
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};
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tlclk: tlclk {
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compatible = "fixed-factor-clock";
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clocks = <&u54 0>; /* Core frequency */
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#clock-cells = <0>;
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clock-div = <2>;
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clock-mult = <1>;
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};
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ethernet@10090000 {
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...
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clocks = <&prci 1>; /* TX clock */
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};

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