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Remove fixupPtrauthDiscriminator (not needed by PR130809)
1 parent fd91a96 commit a2dc74c

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2 files changed

+1
-38
lines changed

2 files changed

+1
-38
lines changed

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 1 addition & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -3228,7 +3228,7 @@ AArch64TargetLowering::EmitEntryPStateSM(MachineInstr &MI,
32283228
return BB;
32293229
}
32303230

3231-
// Partially used by https://github.com/llvm/llvm-project/pull/130809.
3231+
// Used by https://github.com/llvm/llvm-project/pull/130809.
32323232
#if 0
32333233
// Helper function to find the instruction that defined a virtual register.
32343234
// If unable to find such instruction, returns nullptr.
@@ -3255,32 +3255,6 @@ static const MachineInstr *stripVRegCopies(const MachineRegisterInfo &MRI,
32553255
}
32563256
return nullptr;
32573257
}
3258-
3259-
void AArch64TargetLowering::fixupPtrauthDiscriminator(
3260-
MachineInstr &MI, MachineBasicBlock *BB, MachineOperand &IntDiscOp,
3261-
MachineOperand &AddrDiscOp, const TargetRegisterClass *AddrDiscRC) const {
3262-
const TargetInstrInfo *TII = Subtarget->getInstrInfo();
3263-
MachineRegisterInfo &MRI = MI.getMF()->getRegInfo();
3264-
const DebugLoc &DL = MI.getDebugLoc();
3265-
3266-
Register AddrDisc = AddrDiscOp.getReg();
3267-
int64_t IntDisc = IntDiscOp.getImm();
3268-
3269-
// For uniformity, always use NoRegister, as XZR is not necessarily contained
3270-
// in the requested register class.
3271-
if (AddrDisc == AArch64::XZR)
3272-
AddrDisc = AArch64::NoRegister;
3273-
3274-
// Make sure AddrDisc operand respects the register class imposed by MI.
3275-
if (AddrDisc && MRI.getRegClass(AddrDisc) != AddrDiscRC) {
3276-
Register TmpReg = MRI.createVirtualRegister(AddrDiscRC);
3277-
BuildMI(*BB, MI, DL, TII->get(AArch64::COPY), TmpReg).addReg(AddrDisc);
3278-
AddrDisc = TmpReg;
3279-
}
3280-
3281-
AddrDiscOp.setReg(AddrDisc);
3282-
IntDiscOp.setImm(IntDisc);
3283-
}
32843258
#endif
32853259

32863260
MachineBasicBlock *AArch64TargetLowering::EmitInstrWithCustomInserter(
@@ -3388,10 +3362,6 @@ MachineBasicBlock *AArch64TargetLowering::EmitInstrWithCustomInserter(
33883362
return EmitZTInstr(MI, BB, AArch64::MOVT_TIZ, /*Op0IsDef=*/true);
33893363

33903364
case AArch64::PAC:
3391-
#if 0
3392-
fixupPtrauthDiscriminator(MI, BB, MI.getOperand(3), MI.getOperand(4),
3393-
&AArch64::GPR64noipRegClass);
3394-
#endif
33953365
return BB;
33963366
}
33973367
}

llvm/lib/Target/AArch64/AArch64ISelLowering.h

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -195,13 +195,6 @@ class AArch64TargetLowering : public TargetLowering {
195195
MachineBasicBlock *EmitEntryPStateSM(MachineInstr &MI,
196196
MachineBasicBlock *BB) const;
197197

198-
/// Replace (0, vreg) discriminator components with the operands of blend
199-
/// or with (immediate, NoRegister) when possible.
200-
void fixupPtrauthDiscriminator(MachineInstr &MI, MachineBasicBlock *BB,
201-
MachineOperand &IntDiscOp,
202-
MachineOperand &AddrDiscOp,
203-
const TargetRegisterClass *AddrDiscRC) const;
204-
205198
MachineBasicBlock *
206199
EmitInstrWithCustomInserter(MachineInstr &MI,
207200
MachineBasicBlock *MBB) const override;

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