EIC implementation for reconfiguring `ExtInt`s is unsound

[ianrrees]

The EIC peripheral handles multiple external interrupts, which we represent in the HAL as eic::ExtInt structs. Methods on ExtInt allow configuring aspects of the interrupt that are represented in subatomic registers, for example sense() modifies one of the EIC's CONFIG registers in which each byte controls two interrupts. But, there's currently no mechanism that prevents data races in the modification operation. The EXTINTEO register uses one bit per external interrupt for enabling/disabling Event Output.

We've discussed a couple possible resolutions in chat; it's currently unknown whether the PACs allow atomic modifications of a byte within a 32b register (as is supported by hardware). Doing this might mean we could retain the CONFIG-related methods in the current API by offering either an ExtInt that occupies 2 channels, or require a ref to just the other channel that shares a configuration byte. If the PACs only allow modification of a 32b value though, we'll probably need to hold/require a ref to the Eic when modifying CONFIG.