update(riscv/iommu): add multi-lvl DDT support

Signed-off-by: Manuel Rodríguez <[email protected]>

Author: malejo97

src/arch/riscv/inc/arch/iommu.h

@@ -13,4 +13,15 @@ struct iommu_vm_arch {
     EMPTY_STRUCT_FIELDS
 };
 
+struct vm;
+void rv_iommu_fq_irq_handler(irqid_t irq_id);
+void alloc_2lvl_vptrs(void);
+void up_1lvl_to_2lvl(void);
+void alloc_3lvl_vptrs(void);
+void up_2lvl_to_3lvl(void);
+void ddt_init(void);
+void rv_iommu_init(void);
+bool rv_iommu_alloc_did(deviceid_t dev_id);
+void rv_iommu_write_ddt(deviceid_t dev_id, struct vm* vm, paddr_t root_pt);
+
 #endif /* __IOMMU_ARCH_H__ */

src/arch/riscv/inc/arch/platform.h

@@ -23,7 +23,6 @@ struct arch_platform {
 
     struct {
         paddr_t base;      // Base address of the IOMMU mmapped IF
-        unsigned mode;     // Overall IOMMU mode (Off, Bypass, DDT-lvl)
         irqid_t fq_irq_id; // Fault Queue IRQ ID (wired)
     } iommu;