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malejo97noobsplzwinjosecmDavidMCerdeira
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(feat/rh850): bootstrap support for Renesas RH850 architecture
Signed-off-by: Manuel Rodríguez <[email protected]> Co-authored-by: noobsplzwin <[email protected]> Co-authored-by: Jose Martins <[email protected]> Co-authored-by: David Cerdeira <[email protected]>
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‎src/arch/rh850/aborts.c‎

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/**
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* SPDX-License-Identifier: Apache-2.0
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* Copyright (c) Bao Project and Contributors. All rights reserved.
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*/
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#include <emul.h>
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#include <hypercall.h>
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#include <fences.h>
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#include <vmm.h>
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#include <arch/aborts.h>
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#include <arch/emul.h>
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#include <arch/srs.h>
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#define F8_OPCODE (0x3EUL)
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#define F9_OPCODE (0x3FUL)
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#define F9_SUBOPCODE (0x1CUL)
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#define OPCODE_SHIFT (5)
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#define OPCODE_MASK (0x3FUL << OPCODE_SHIFT)
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#define SUBOPCODE_SHIFT (19)
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#define SUBOPCODE_MASK (0x1FFFUL << SUBOPCODE_SHIFT)
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#define SUB8_SHIFT (14)
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#define SUB8_MASK (0x3UL << SUB8_SHIFT)
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#define SUB9_SHIFT (17)
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#define SUB9_MASK (0x3UL << SUB9_SHIFT)
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#define BITIDX_SHIFT (11)
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#define BITIDX_MASK (0x7UL << BITIDX_SHIFT)
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#define REGIDX_SHIFT (11)
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#define REGIDX_MASK (0x1FUL << REGIDX_SHIFT)
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// LEN (Bits 31-28)
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#define MEI_LEN_MASK (0xFUL << 28)
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#define MEI_LEN_SHIFT 28
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#define MEI_GET_LEN(val) (((val) & MEI_LEN_MASK) >> MEI_LEN_SHIFT)
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// REG (Bits 20-16)
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#define MEI_REG_MASK (0x1F << 16)
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#define MEI_REG_SHIFT 16
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#define MEI_GET_REG(val) (((val) & MEI_REG_MASK) >> MEI_REG_SHIFT)
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// DS (Bits 11-9)
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#define MEI_DS_MASK (0x7 << 9)
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#define MEI_DS_SHIFT 9
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#define MEI_GET_DS(val) (((val) & MEI_DS_MASK) >> MEI_DS_SHIFT)
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// U (Bit 8)
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#define MEI_U_MASK (1 << 8)
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#define MEI_GET_U(val) (((val) & MEI_U_MASK) >> 8)
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// RW (Bit 0)
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#define MEI_RW_MASK (1 << 0)
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#define MEI_GET_RW(val) ((val) & MEI_RW_MASK)
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static unsigned long read_instruction(unsigned long pc)
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{
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unsigned long inst = 0;
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unsigned short* pc_ptr = (unsigned short*)(pc);
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if (pc & 0x1) {
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ERROR("Trying to read guest unaligned instruction");
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}
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/* Enable Hyp access to VM space */
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set_mpid7(HYP_SPID);
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fence_sync();
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inst = (unsigned long)(*pc_ptr | (*(pc_ptr+1) << 16));
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/* Disable Hyp access to VM space */
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set_mpid7(HYP_AUX_SPID);
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fence_sync();
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return inst;
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}
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static void data_abort(void)
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{
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unsigned long mea = get_mea();
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unsigned long mei = get_mei();
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unsigned int len = MEI_GET_LEN(mei);
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unsigned int reg = MEI_GET_REG(mei);
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unsigned int ds = MEI_GET_DS(mei);
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unsigned int u = MEI_GET_U(mei);
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/* unsigned int itype = MEI_GET_ITYPE(mei); */
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unsigned int rw = MEI_GET_RW(mei);
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vaddr_t addr = mea;
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/* Decode possible bitwise instruction */
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unsigned long inst = read_instruction(vcpu_readpc(cpu()->vcpu));
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unsigned long opcode = ((inst & OPCODE_MASK) >> OPCODE_SHIFT);
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unsigned long subopcode = ((inst & SUBOPCODE_MASK) >> SUBOPCODE_SHIFT);
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unsigned long bit_op = 0;
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unsigned long mask = 0;
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if (opcode == F8_OPCODE) {
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mask = 1UL << ((inst & BITIDX_MASK) >> BITIDX_SHIFT);
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bit_op = ((inst & SUB8_MASK) >> SUB8_SHIFT) + 1;
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}
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else if (opcode == F9_OPCODE && subopcode == F9_SUBOPCODE) {
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unsigned long reg_idx = (inst & REGIDX_MASK) >> REGIDX_SHIFT;
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unsigned long bit_idx = vcpu_readreg(cpu()->vcpu, reg_idx);
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mask = 1UL << (bit_idx & 0x7UL);
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bit_op = ((inst & SUB9_MASK) >> SUB9_SHIFT) + 1;
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}
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emul_handler_t handler = vm_emul_get_mem(cpu()->vcpu->vm, addr);
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if (handler != NULL) {
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struct emul_access emul;
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emul.addr = addr;
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emul.width = len;
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emul.write = rw ? true : false;
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emul.reg = reg;
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emul.reg_width = ds;
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emul.sign_ext = ~u;
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emul.arch.op = (enum bitwise_op)bit_op;
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emul.arch.byte_mask = mask;
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if (handler(&emul)) {
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unsigned long pc_step = len;
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vcpu_writepc(cpu()->vcpu, vcpu_readpc(cpu()->vcpu) + pc_step);
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} else {
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ERROR("Data abort emulation failed (0x%x)", addr);
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}
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} else {
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ERROR("No emulation handler for access to 0x%x, at 0x%x", addr, vcpu_readpc(cpu()->vcpu));
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}
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}
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static void hvtrap(void) {
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unsigned long r6 = vcpu_readreg(cpu()->vcpu , 6);
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unsigned long res = (unsigned long)hypercall(r6);
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vcpu_writereg(cpu()->vcpu, 6, res);
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}
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void abort(void)
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{
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unsigned long psw = get_psw();
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unsigned long cause = (psw & (0x1UL << 7)) ?
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(get_feic() & 0xFFFFUL) :
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(get_eiic() & 0xFFFFUL);
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switch (cause) {
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case 0x01:
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WARNING("Exception: RESET - Reset input\n");
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break;
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case 0x1C:
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WARNING("Exception: SYSERR - System error (context saving error)\n");
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break;
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case 0x1D:
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WARNING("Exception: SYSERR - System error (error prior to register bank "
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"restoration)\n");
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break;
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case 0x60:
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WARNING("Exception: RIE - Reserved instruction exception\n");
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break;
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case 0x71:
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WARNING("Exception: FPE - FPU exception (precise)\n");
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break;
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case 0x75:
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WARNING("Exception: FXE - FXU exception (precise)\n");
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break;
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case 0x80:
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case 0x81:
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case 0x82:
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WARNING("Exception: UCPOP - Coprocessor unusable exception\n");
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break;
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case 0x90:
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WARNING("Exception: MIP - Memory protection exception due to instruction fetching\n");
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break;
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case 0x91:
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data_abort();
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break;
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case 0x95:
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WARNING("Exception: MDP - Memory protection exception (interrupt table reference "
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"method)\n");
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break;
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case 0x98:
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WARNING("Exception: MIP - Guest memory protection exception due to instruction "
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"fetching\n");
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break;
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case 0x99:
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data_abort();
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break;
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case 0x9D:
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WARNING("Exception: MDP - Guest memory protection exception (interrupt table "
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"reference method)\n");
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break;
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case 0xA0:
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WARNING("Exception: PIE - Privilege instruction exception\n");
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break;
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case 0xC0:
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WARNING("Exception: MAE - Misalignment exception\n");
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break;
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case 0xE0:
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WARNING("Exception: FENMI - FENMI interrupt\n");
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break;
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default:
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if (cause >= 0xF0 && cause <= 0xFF) {
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WARNING("FEINT - FEINT interrupt");
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} else if (cause >= 0x1000 && cause <= 0x17FF) {
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WARNING("EIINT - User interrupt");
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} else if (cause >= 0x10 && cause <= 0x1F) {
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WARNING("SYSERR - System error (instruction fetch error)");
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} else if (cause >= 0xf000 && cause <= 0xf01f) {
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hvtrap();
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}else if (cause >= 0x8000 && cause <= 0x80FF) {
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WARNING("SYSCALL - System call");
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} else if (cause >= 0x31 && cause <= 0x3F) {
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WARNING("FETRAP - FE level trap");
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} else if (cause >= 0x40 && cause <= 0x4F) {
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WARNING("TRAP0 - EI level trap 0");
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} else if (cause >= 0x50 && cause <= 0x5F) {
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WARNING("TRAP1 - EI level trap 1");
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} else {
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WARNING("Exception: Unknown exception code: 0x%X\n", cause);
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}
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break;
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}
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}

‎src/arch/rh850/arch.mk‎

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## SPDX-License-Identifier: Apache-2.0
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## Copyright (c) Bao Project and Contributors. All rights reserved.
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# RH850 specific flags for compiler
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arch-cflags+=-mv850e3v5
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arch-cflags+=-mrh850-abi
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arch-cflags+=-m8byte-align
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arch-cflags+=-msoft-float
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arch-cflags+=-fno-leading-underscore
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# RH850 specific flags for assembler
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arch-asflags+=-mv850e3v5
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arch-asflags+=-mrh850-abi
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arch-asflags+=-m8byte-align
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arch_mem_prot:=mpu
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PAGE_SIZE:=64

‎src/arch/rh850/asm_defs.c‎

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/**
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* SPDX-License-Identifier: Apache-2.0
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* Copyright (c) Bao Project and Contributors. All rights reserved.
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*/
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#include <bao.h>
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#include <cpu.h>
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#include <vm.h>
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#include <platform.h>
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__attribute__((used)) static void cpu_defines(void)
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{
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DEFINE_SIZE(CPU_SIZE, struct cpu);
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DEFINE_OFFSET(CPU_STACK_OFF, struct cpu, stack);
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DEFINE_SIZE(CPU_STACK_SIZE, ((struct cpu*)NULL)->stack);
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DEFINE_OFFSET(CPU_VCPU_OFF, struct cpu, vcpu);
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}
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__attribute__((used)) static void vcpu_defines(void)
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{
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DEFINE_SIZE(VCPU_ARCH_SIZE, struct vcpu_arch);
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DEFINE_OFFSET(VCPU_REGS_OFF, struct vcpu, regs);
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DEFINE_SIZE(VCPU_REGS_SIZE, struct arch_regs);
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}
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__attribute__((used)) static void platform_defines(void)
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{
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DEFINE_OFFSET(PLAT_CPUNUM_OFF, struct platform, cpu_num);
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DEFINE_OFFSET(PLAT_ARCH_OFF, struct platform, arch);
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}

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