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11 | 11 | #ifndef __ASSEMBLER__ |
12 | 12 |
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13 | 13 | #define SYSREG_GEN_ACCESSORS(name, op1, crn, crm, op2) \ |
14 | | - static inline unsigned long sysreg_##name##_read() \ |
| 14 | + static inline unsigned long sysreg_##name##_read(void) \ |
15 | 15 | { \ |
16 | 16 | unsigned long _temp; \ |
17 | 17 | __asm__ volatile("mrc p15, " #op1 ", %0, " #crn ", " #crm ", %1\n\r" : "=r"(_temp) \ |
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24 | 24 | } |
25 | 25 |
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26 | 26 | #define SYSREG_GEN_ACCESSORS_BANKED(name, reg) \ |
27 | | - static inline unsigned long sysreg_##name##_read() \ |
| 27 | + static inline unsigned long sysreg_##name##_read(void) \ |
28 | 28 | { \ |
29 | 29 | unsigned long _temp; \ |
30 | 30 | __asm__ volatile("mrs %0, " XSTR(reg) "\n\r" : "=r"(_temp)); \ |
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36 | 36 | } |
37 | 37 |
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38 | 38 | #define SYSREG_GEN_ACCESSORS_64(reg, op1, crm) \ |
39 | | - static inline unsigned long long sysreg_##reg##_read() \ |
| 39 | + static inline unsigned long long sysreg_##reg##_read(void) \ |
40 | 40 | { \ |
41 | 41 | unsigned long long _temp, _tempH; \ |
42 | 42 | __asm__ volatile("mrrc p15, " #op1 ", %0, %1, " #crm "\n\r" : "=r"(_temp), "=r"(_tempH)); \ |
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49 | 49 | } |
50 | 50 |
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51 | 51 | #define SYSREG_GEN_ACCESSORS_MERGE(reg, reg1, reg2) \ |
52 | | - static inline unsigned long long sysreg_##reg##_read() \ |
| 52 | + static inline unsigned long long sysreg_##reg##_read(void) \ |
53 | 53 | { \ |
54 | 54 | return ((unsigned long long)sysreg_##reg2##_read() << 32) | sysreg_##reg1##_read(); \ |
55 | 55 | } \ |
@@ -154,12 +154,12 @@ static inline void arm_at_s12e1w(vaddr_t vaddr) |
154 | 154 | __asm__ volatile("mcr p15, 0, %0, c7, c8, 5" ::"r"(vaddr)); // ats12nsopw |
155 | 155 | } |
156 | 156 |
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157 | | -static inline void arm_tlbi_alle2is() |
| 157 | +static inline void arm_tlbi_alle2is(void) |
158 | 158 | { |
159 | 159 | __asm__ volatile("mcr p15, 4, r0, c8, c7, 0"); |
160 | 160 | } |
161 | 161 |
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162 | | -static inline void arm_tlbi_vmalls12e1is() |
| 162 | +static inline void arm_tlbi_vmalls12e1is(void) |
163 | 163 | { |
164 | 164 | __asm__ volatile("mcr p15, 0, r0, c8, c7, 0"); |
165 | 165 | } |
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