feat(arch/mpu): add mpu region context switch

During the context switch of MPU regions, locked entries are not
disabled.

Signed-off-by: Miguel Silva <[email protected]>

Author: miguelafsilva5

src/arch/armv8/aarch32/exceptions.S

@@ -50,11 +50,34 @@
     push {r0-r12}
     SAVE_ELR_SPSR
 
+#ifdef MEM_PROT_MPU
+    mrc p15, 4, r0, c13, c0, 2  // Read HTPIDR (CPU base address)
+    add r0, r0, #CPU_AS_ARCH_MASK_OFF
+    ldr r0, [r0]
+    mcr p15, 4, r0, c6, c1, 1
+#endif /* MEM_PROT_MPU */
+
 .endm
 
 .macro VM_ENTRY
 
     mrc p15, 4, r0, c13, c0, 2  // Read HTPIDR (CPU base address)
+
+#ifdef MEM_PROT_MPU
+    ldr r1, [r0, #CPU_VCPU_OFF]
+    mov r2, #VCPU_VM_OFF
+    add r1, r1, r2
+    ldr r1, [r1]
+    ldr r1, [r1, #VM_AS_ARCH_MASK_OFF]
+
+    mov r2, #CPU_ARCH_PROFILE_MPU_LOCKED_OFF
+    add r2, r2, r0
+    ldr r2, [r2]
+
+    orr r1, r1, r2
+    mcr p15, 4, r1, c6, c1, 1
+#endif /* MEM_PROT_MPU */
+
     ldr r0, [r0, #CPU_VCPU_OFF]
     add r0, r0, #VCPU_REGS_OFF
     mov sp, r0

src/arch/armv8/aarch64/exceptions.S

@@ -64,11 +64,35 @@
     add x0, x0, x1
     mov sp, x0
 
+    #ifdef MEM_PROT_MPU
+    mrs x0, tpidr_el2
+    add x0, x0, #CPU_AS_ARCH_MASK_OFF
+    ldr x0, [x0]
+    msr prenr_el2, x0
+    #endif /* MEM_PROT_MPU */
+
 .endm
 
 .global vcpu_arch_entry
 vcpu_arch_entry:
     mrs x0, tpidr_el2
+
+    #ifdef MEM_PROT_MPU
+    ldr x1, [x0, #CPU_VCPU_OFF]
+    mov x2, #VCPU_VM_OFF
+    add x1, x1, x2
+    ldr x1, [x1]
+    ldr x1, [x1, #VM_AS_ARCH_MASK_OFF]
+
+    mov x2, #CPU_ARCH_PROFILE_MPU_LOCKED_OFF
+    add x2, x2, x0
+    ldr x2, [x2]
+
+    orr x1, x1, x2
+    
+    msr prenr_el2, x1
+    #endif /* MEM_PROT_MPU */
+
     ldr x0, [x0, #CPU_VCPU_OFF]
     add x0, x0, #VCPU_REGS_OFF
     mov sp, x0

src/arch/armv8/armv8-r/inc/arch/mem.h

@@ -36,6 +36,10 @@ typedef union {
     };
 } mem_flags_t;
 
+struct addr_space_arch {
+    unsigned long mpu_entry_mask;
+};
+
 #define PTE_FLAGS(_prbar, _prlar) \
     ((mem_flags_t){               \
         .prbar = (_prbar),        \

src/arch/armv8/armv8-r/mem.c

@@ -7,5 +7,5 @@
 
 void as_arch_init(struct addr_space* as)
 {
-    UNUSED_ARG(as);
+    as->arch.mpu_entry_mask = 0;
 }

src/core/mpu/inc/mem_prot/mem.h

@@ -27,6 +27,7 @@ struct addr_space {
     enum AS_TYPE type;
     cpumap_t cpus;
     colormap_t colors;
+    struct addr_space_arch arch;
     struct {
         struct list ordered_list;
         struct mpe {

src/core/mpu/mem.c

@@ -11,6 +11,7 @@
 #include <platform_defs.h>
 #include <objpool.h>
 #include <config.h>
+#include <arch/mpu.h>
 
 struct shared_region {
     enum AS_TYPE as_type;