Test PUSH/POP instructions with different operand size

[barotto]

From VOGONS thread https://www.vogons.org/viewtopic.php?f=9&t=60095

Another code bug revealed with the POP ES instruction: it wasn't using the operand size to perform the 16-bit POP. So it was always increasing/decreasing (E)SP with 2 instead of the proper 4.

Test for this.

[superfury]

You might as well make it a full push/pop test with different operand sizes and src/destinations? So all basic segment register push/pop, opcode 8F pop, opcode ff push, 80186+ immediate pushes(push imm8/16/32), off the top of my head.

[barotto]

Added:
50+rw PUSH r16
50+rd PUSH r32
58+rw POP r16
58+rd POP r32

[superfury]

There's also:
06 PUSH ES
07 POP ES
0E PUSH CS
16 PUSH SS
17 POP SS
1E PUSH DS
1F POP DS
60 PUSHA(D)
61 POPA(D)
68 PUSH imm16/32
6A PUSH imm8
8F /0 POP r/m16/32
9C PUSHF(D)
9D POPF(D)
FF /6 PUSH r/m16/32
0F A0 PUSH FS
0F A1 POP FS
0F A8 PUSH GS
0F A9 POP GS

Don't know how many of these are already tested against operand size, address size and/or stack address size(the B bit within the stack segment descriptor)? Although the stack address size might be outside of the current checks on this testsuite atm(since not much of protected mode is verified)?

[barotto]

I know, some of those instructions maybe used but none of them are explicity tested, yet.
If an instruction is "officially" tested, it is marked as such in in the opcodes list (intel-opcodes.ods). That list also discriminates for operand size, address size, and stack size.

[superfury]

So that means that the untested stack instructions still are:
PUSHF(D)/POPF(D)
PUSH imm(except one case of imm8)
PUSH/POP Segreg(all segment registers, except POP CS)
PUSH/POP mem16/32
PUSHA/POPA

Those are still untested against operand/address/stack size, but pretty important for proper execution flow?

Even most basic pretty important instructions are left unchecked?
So:
Most math instructions(sub,sbb,add,or,and,xor,cmp) in the low opcode range(00-3Fh).
Most MOV instructions.
LEAVE
32-bit relative jumps(0F 8*)
Most INC/DEC instructions(flags not affecting Carry flag, r/m16/32).
Various CMP instructions

Why isn't INC/DEC(r/m16/32)/CMP/TEST tested with test 0xEE?

[barotto]

PUSHA/POPA are heavily used for calls, that doesn't mean they are bug free though. They have to be properly tested for corner cases.
This is the count of all the instructions currently used: icnt.txt

Even most basic pretty important instructions are left unchecked?

Yep.

Why isn't INC/DEC(r/m16/32)/CMP/TEST tested with test 0xEE?

Because there are only 24 hours in a day, usually :)

[barotto]

Added:
0E PUSH CS
1E PUSH DS
1F POP DS
16 PUSH SS
17 POP SS
06 PUSH ES
07 POP ES
0FA0 PUSH FS
0FA1 POP FS
0FA8 PUSH GS
0FA9 POP GS

[superfury]

So, that still leaves:

60 PUSHA(D)
61 POPA(D)
68 PUSH imm16/32
6A PUSH imm8
8F /0 POP r/m16/32
9C PUSHF(D)
9D POPF(D)
FF /6 PUSH r/m16/32

As well as those INC/DEC(16&32 bits variants)/CMP/TEST on test EE(where, CMP=SUB and TEST=AND on a logical flag level(unaffected registers other than flags). INC/DEC is about the same as ADD/SUB with 1, but not affecting the carry flag).

Edit: It seems the INC/DEC/CMP/TEST instructions aren't tested during the 0xEE test at all?

Tests are still passing atm(with your latest commits).

Although, thinking about it, those PUSH imm8/16/32 might need some self-modifying code in order to be tested extensively(modifying the value that's pushed).

[barotto]

Can you test an older version of your emu to see if that POP ES bug you talked about at vogons can now be detected with test386?

self-modifying code

I think that would be a bit overkill... I'll probably test with some pattern.

[superfury]

I've just tested the current testsuite against a bit older commit of UniPCemu, before the POP ES fix. It does properly error out during the POST 0A tests.

[barotto]

It does properly error out during the POST 0A tests.

Nice.

Added:
FF /6 PUSH r/m16
FF /6 PUSH r/m32
8F /6 POP r/m16
8F /6 POP r/m32

[superfury]

Don't you mean 8F /0? 8F /1-7 are #UDs.

That just leaves:
60 PUSHA(D)
61 POPA(D)
68 PUSH imm16/32
6A PUSH imm8
9C PUSHF(D)
9D POPF(D)

Edit: So far no errors have occurred yet:D

[barotto]

Yes you're right, 8F/0, cut'n'paste error...