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simx86: apply proper padding to push fs/gs, fix other push sreg [dosemu2#2655]
Fixes Transport Tycoon in Sim mode. Fixes dosemu2#2655
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src/base/emu-i386/simx86/interp.c

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1013,7 +1013,7 @@ intop3b: { int op = ArOpsFR[D_MO(opc)];
10131013
/* optimized multiple register push */
10141014
while (1) {
10151015
int op;
1016-
if (opc > 8 && !(_mode & DATA16)) // 32-bit segreg
1016+
if (opc > 8 && !(m & DATA16)) // 32-bit segreg
10171017
m |= SEGREG;
10181018
Gen(O_PUSH2, m, R1Tab_l[opc-1]);
10191019
PC++;
@@ -2479,7 +2479,9 @@ intop3b: { int op = ArOpsFR[D_MO(opc)];
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break;
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///
24812481
case 0xa0: /* PUSHfs */
2482-
Gen(L_REG, _mode, Ofs_FS);
2482+
Gen(L_REG, _mode|DATA16, Ofs_FS);
2483+
if (!(_mode & DATA16)) // 32-bit segreg padding
2484+
Gen(L_ZXAX, _mode);
24832485
Gen(O_PUSH, _mode); PC+=2;
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break;
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case 0xa1: /* POPfs */
@@ -2572,7 +2574,9 @@ intop3b: { int op = ArOpsFR[D_MO(opc)];
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/* case 0xa7: CMPXCHGw (486 STEP A only) */
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///
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case 0xa8: /* PUSHgs */
2575-
Gen(L_REG, _mode, Ofs_GS);
2577+
Gen(L_REG, _mode|DATA16, Ofs_GS);
2578+
if (!(_mode & DATA16)) // 32-bit segreg padding
2579+
Gen(L_ZXAX, _mode);
25762580
Gen(O_PUSH, _mode); PC+=2;
25772581
break;
25782582
case 0xa9: /* POPgs */

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