|
37 | 37 | #include <math.h> |
38 | 38 | #include "dos2linux.h" |
39 | 39 | #include "emu86.h" |
| 40 | +#include "utilities.h" |
40 | 41 | #include "codegen.h" |
41 | 42 | #include "codegen-sim.h" |
42 | 43 | #ifndef HAVE___FLOAT80 |
|
74 | 75 | #define M_LOG2El 1.442695040888963407359924681001892137L |
75 | 76 | #endif |
76 | 77 |
|
77 | | -int (*Fp87_op)(int exop, int reg, unsigned mem_ref); |
78 | | -static int Fp87_op_sim(int exop, int reg, unsigned mem_ref); |
| 78 | +void (*Fp87_op)(int exop, int reg, unsigned mem_ref); |
| 79 | +static void Fp87_op_sim(int exop, int reg, unsigned mem_ref); |
79 | 80 |
|
80 | 81 | static long double WFR0, WFR1; |
81 | 82 |
|
@@ -256,7 +257,7 @@ static void write_long_double(dosaddr_t addr, long double ld) |
256 | 257 | sim_write_word(addr+8, x.u32[2]); |
257 | 258 | } |
258 | 259 |
|
259 | | -static int Fp87_op_sim(int exop, int reg, unsigned mem_ref) |
| 260 | +static void Fp87_op_sim(int exop, int reg, unsigned mem_ref) |
260 | 261 | { |
261 | 262 | // 42 DA 11000nnn FCMOVB st(0),st(n) |
262 | 263 | // 43 DB 11000nnn FCMOVNB st(0),st(n) |
@@ -1176,9 +1177,116 @@ fcom00: TheCPU.fpus &= ~(FPUS_C0 | FPUS_C2 | FPUS_C3); |
1176 | 1177 |
|
1177 | 1178 | /*xx*/ default: |
1178 | 1179 | fp_notok: |
1179 | | - return -1; |
| 1180 | + // should be caught by Fp87_illegal_op |
| 1181 | + dosemu_error("Unknown FPop %x.%d\n", exop, reg); |
1180 | 1182 | } |
1181 | 1183 | fp_ok: |
1182 | | - return 0; |
1183 | 1184 | } |
1184 | 1185 |
|
| 1186 | +int Fp87_illegal_op(int exop, int reg) |
| 1187 | +{ |
| 1188 | + e_printf("FPop %x.%d\n", exop, reg); |
| 1189 | + |
| 1190 | + switch(exop) { |
| 1191 | +// 09 D9 xx001nnn undefined |
| 1192 | +/*09*/ case 0x09: |
| 1193 | + |
| 1194 | +// 0B DB xx001nnn FISTTP dw // SSE3 capable CPUs |
| 1195 | +// 0D DD xx001nnn FISTTP qw // SSE3 capable CPUs |
| 1196 | +// 0F DF xx001nnn FISTTP w // SSE3 capable CPUs |
| 1197 | + case 0x0b: case 0x0d: case 0x0f: |
| 1198 | + |
| 1199 | +// 23 DB xx100nnn undefined |
| 1200 | +// 2D DD xx101nnn undefined |
| 1201 | +// 33 DB xx110nnn undefined |
| 1202 | + case 0x23: case 0x2d: case 0x33: |
| 1203 | + |
| 1204 | +// 42 DA 11000nnn FCMOVB st(0),st(n) (CPUID) |
| 1205 | +// 43 DB 11000nnn FCMOVNB st(0),st(n) (CPUID) |
| 1206 | +// 4A DA 11001nnn FCMOVE st(0),st(n) (CPUID) |
| 1207 | +// 4B DB 11001nnn FCMOVNE st(0),st(n) (CPUID) |
| 1208 | + case 0x42: case 0x43: case 0x4a: case 0x4b: |
| 1209 | + break; |
| 1210 | + |
| 1211 | +// 51 D9 11010nnn 51.0=FNOP, others undefined |
| 1212 | +/*51*/ case 0x51: |
| 1213 | + if (reg==0) goto fp_ok; |
| 1214 | + break; |
| 1215 | + |
| 1216 | +// 52 DA 11010nnn FCMOVBE st(0),st(n) (CPUID) |
| 1217 | +// 53 DB 11010nnn FCMOVNBE st(0),st(n) (CPUID) |
| 1218 | +// 5A DA 11011nnn FCMOVU st(0),st(n) (CPUID) |
| 1219 | +// 5B DB 11011nnn FCMOVNU st(0),st(n) (CPUID) |
| 1220 | + case 0x52: case 0x53: case 0x5a: case 0x5b: |
| 1221 | + break; |
| 1222 | + |
| 1223 | +// 5E DE 11011nnn 5E.1 = FCOMPP, others undefined |
| 1224 | + if (reg==1) goto fp_ok; |
| 1225 | + break; |
| 1226 | + |
| 1227 | + case 0x5e: |
| 1228 | + |
| 1229 | +// 61 D9 11100nnn 0,1,4,5 valid, others undefined |
| 1230 | + case 0x61: |
| 1231 | + switch(reg) { |
| 1232 | + case 0: /* FCHS */ |
| 1233 | + case 1: /* FABS */ |
| 1234 | + case 4: /* FTST */ |
| 1235 | + case 5: /* FXAM */ |
| 1236 | + goto fp_ok; |
| 1237 | + default: |
| 1238 | + break; |
| 1239 | + } |
| 1240 | + break; |
| 1241 | + |
| 1242 | +// 62 DA 11100nnn invalid |
| 1243 | + case 0x62: |
| 1244 | + |
| 1245 | +// 63 DB 11000nnn 63.5, 63.6, 63.7 are invalid |
| 1246 | +/*63*/ case 0x63: |
| 1247 | + if (reg < 5) goto fp_ok; |
| 1248 | + break; |
| 1249 | + |
| 1250 | +// 67 DF 11100nnn 67.0=FNSTSW AX, others undefined |
| 1251 | + case 0x67: |
| 1252 | + if (reg==0) goto fp_ok; |
| 1253 | + break; |
| 1254 | + |
| 1255 | +// 69 D9 11101nnn <7 defined, 7 invalid |
| 1256 | + case 0x69: |
| 1257 | + if (reg!=7) goto fp_ok; |
| 1258 | + break; |
| 1259 | + |
| 1260 | +// 6A DA 11101nnn 6A.1=FUCOMPP, others undefined |
| 1261 | + case 0x6a: |
| 1262 | + if (reg==1) goto fp_ok; |
| 1263 | + break; |
| 1264 | + |
| 1265 | +// 6B DB 11101nnn FUCOMI (CPUID) |
| 1266 | +// 6F DF 11101nnn FUCOMIP (CPUID) |
| 1267 | + case 0x6b: case 0x6f: |
| 1268 | + |
| 1269 | +// 72 DA 11110nnn undefined |
| 1270 | +/*72*/ case 0x72: |
| 1271 | + |
| 1272 | +// 73 DB 11110nnn FCOMI (CPUID) |
| 1273 | +/*73*/ case 0x73: |
| 1274 | + |
| 1275 | +// 75 DD 11110nnn undefined |
| 1276 | +/*75*/ case 0x75: |
| 1277 | + |
| 1278 | +// 77 DF 11110nnn FCOMIP (CPUID) |
| 1279 | +/*77*/ case 0x77: |
| 1280 | + |
| 1281 | +// 7A DA 11111nnn undefined |
| 1282 | +// 7B DB 11111nnn undefined |
| 1283 | +// 7D DD 11111nnn undefined |
| 1284 | +// 7F DF 11111nnn undefined |
| 1285 | + case 0x7a: case 0x7b: case 0x7d: case 0x7f: |
| 1286 | + break; |
| 1287 | + |
| 1288 | + default: |
| 1289 | +fp_ok: return 0; |
| 1290 | + } |
| 1291 | + return 1; |
| 1292 | +} |
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