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/* 1st addressing cycle */
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#define ADDR_1st_CYCLE (ADDR ) (uint8_t)((ADDR)& 0xFF)
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- /* 2st addressing cycle */
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+ /* 2nd addressing cycle */
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#define ADDR_2nd_CYCLE (ADDR ) (uint8_t)(((ADDR)& 0xFF00) >> 8)
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- /* 3st addressing cycle */
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+ /* 3rd addressing cycle */
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#define ADDR_3rd_CYCLE (ADDR ) (uint8_t)(((ADDR)& 0xFF0000) >> 16)
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- /* 4st addressing cycle */
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+ /* 4th addressing cycle */
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#define ADDR_4th_CYCLE (ADDR ) (uint8_t)(((ADDR)& 0xFF000000) >> 24)
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static void spi_flash_gpio_init ()
@@ -215,9 +215,9 @@ static void spi_flash_write_page_async(uint8_t *buf, uint32_t page,
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page = page << PAGE_ADDRESS_OFFSET ;
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- spi_flash_send_byte (ADDR_1st_CYCLE (page ));
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- spi_flash_send_byte (ADDR_2nd_CYCLE (page ));
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spi_flash_send_byte (ADDR_3rd_CYCLE (page ));
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+ spi_flash_send_byte (ADDR_2nd_CYCLE (page ));
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+ spi_flash_send_byte (ADDR_1st_CYCLE (page ));
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for (i = 0 ; i < page_size ; i ++ )
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spi_flash_send_byte (buf [i ]);
@@ -234,9 +234,9 @@ static uint32_t spi_flash_read_data(uint8_t *buf, uint32_t page,
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spi_flash_send_byte (CMD_FLASH_PAGE_READ );
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- spi_flash_send_byte (ADDR_1st_CYCLE (addr ));
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- spi_flash_send_byte (ADDR_2nd_CYCLE (addr ));
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spi_flash_send_byte (ADDR_3rd_CYCLE (addr ));
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+ spi_flash_send_byte (ADDR_2nd_CYCLE (addr ));
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+ spi_flash_send_byte (ADDR_1st_CYCLE (addr ));
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/* AT45DB requires write of dummy byte after address */
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spi_flash_send_byte (FLASH_DUMMY_BYTE );
@@ -268,9 +268,9 @@ static uint32_t spi_flash_erase_block(uint32_t page)
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spi_flash_send_byte (CMD_FLASH_BLOCK_ERASE );
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- spi_flash_send_byte (ADDR_1st_CYCLE (addr ));
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- spi_flash_send_byte (ADDR_2nd_CYCLE (addr ));
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spi_flash_send_byte (ADDR_3rd_CYCLE (addr ));
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+ spi_flash_send_byte (ADDR_2nd_CYCLE (addr ));
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+ spi_flash_send_byte (ADDR_1st_CYCLE (addr ));
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spi_flash_deselect_chip ();
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