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Commit c1360c6

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Added BOOT0 to PCB to allow full erase using buildin bootloader
1 parent c386eed commit c1360c6

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+1938
-1548
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5 files changed

+1938
-1548
lines changed
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(module PinHeader_1x02_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC)
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(descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row")
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(tags "Through hole pin header THT 1x02 2.54mm single row")
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(fp_text reference REF** (at 0 -2.33) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value PinHeader_1x02_P2.54mm_Vertical (at 0 4.87) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
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(fp_line (start 1.27 -1.27) (end 1.27 3.81) (layer F.Fab) (width 0.1))
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(fp_line (start 1.27 3.81) (end -1.27 3.81) (layer F.Fab) (width 0.1))
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(fp_line (start -1.27 3.81) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
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(fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
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(fp_line (start -1.33 3.87) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
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(fp_line (start -1.33 1.27) (end -1.33 3.87) (layer F.SilkS) (width 0.12))
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(fp_line (start 1.33 1.27) (end 1.33 3.87) (layer F.SilkS) (width 0.12))
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(fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
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(fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
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(fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
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(fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.8 4.35) (end 1.8 4.35) (layer F.CrtYd) (width 0.05))
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(fp_line (start 1.8 4.35) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
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(fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
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(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1.0) (layers *.Cu *.Mask))
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(pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1.0) (layers *.Cu *.Mask))
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(fp_text user %R (at 0 1.27 90) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x02_P2.54mm_Vertical.wrl
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)

kicad/nand_programmator-cache.lib

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EESchema-LIBRARY Version 2.4
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#encoding utf-8
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#
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# Connector_Generic_Conn_01x02
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#
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DEF Connector_Generic_Conn_01x02 J 0 40 Y N 1 F N
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F0 "J" 0 100 50 H V C CNN
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F1 "Connector_Generic_Conn_01x02" 0 -200 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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Connector*:*_1x??_*
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$ENDFPLIST
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DRAW
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S -50 -95 0 -105 1 1 6 N
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S -50 5 0 -5 1 1 6 N
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S -50 50 50 -150 1 1 10 f
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X Pin_1 1 -200 0 150 R 50 50 1 1 P
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X Pin_2 2 -200 -100 150 R 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Connector_Generic_Conn_01x03
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#
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DEF Connector_Generic_Conn_01x03 J 0 40 Y N 1 F N

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