Add support of HW ECC

bbogush · bbogush · commit ccfe0e229e23 · 2021-06-28T14:18:57.000+03:00
diff --git a/firmware/programmer/flash_hal.h b/firmware/programmer/flash_hal.h
@@ -31,6 +31,7 @@ typedef struct
     void (*write_page_async)(uint8_t *buf, uint32_t page, uint32_t page_size);
     uint32_t (*read_status)();
     bool (*is_bb_supported)();
+    uint32_t (*enable_hw_ecc)(bool enable);
 } flash_hal_t;
 
 #endif /* _FLASH_HAL_H_ */
diff --git a/firmware/programmer/fsmc_nand.c b/firmware/programmer/fsmc_nand.c
@@ -54,6 +54,10 @@ typedef struct __attribute__((__packed__))
     uint8_t erase1_cmd;
     uint8_t erase2_cmd;
     uint8_t status_cmd;
+    uint8_t set_features_cmd;
+    uint8_t enable_ecc_addr;
+    uint8_t enable_ecc_value;
+    uint8_t disable_ecc_value;
 } fsmc_conf_t;
 
 static fsmc_conf_t fsmc_conf;
@@ -136,6 +140,10 @@ static void nand_print_fsmc_info()
     DEBUG_PRINT("Erase 1 command: %d\r\n", fsmc_conf.erase1_cmd);
     DEBUG_PRINT("Erase 2 command: %d\r\n", fsmc_conf.erase2_cmd);
     DEBUG_PRINT("Status command: %d\r\n", fsmc_conf.status_cmd);
+    DEBUG_PRINT("Set feature command: %d\r\n", fsmc_conf.set_feature_cmd);
+    DEBUG_PRINT("Enable ECC address: %d\r\n", fsmc_conf.enable_ecc_addr);
+    DEBUG_PRINT("Enable ECC value: %d\r\n", fsmc_conf.enable_ecc_value);
+    DEBUG_PRINT("Disable ECC value: %d\r\n", fsmc_conf.disable_ecc_value);
 }
 
 static void nand_reset()
@@ -469,6 +477,26 @@ static inline bool nand_is_bb_supported()
     return true;
 }
 
+static uint32_t nand_enable_hw_ecc(bool enable)
+{
+    uint8_t enable_ecc;
+
+    if (fsmc_conf.set_features_cmd == UNDEFINED_CMD)
+        return FLASH_STATUS_INVALID_CMD;
+
+    enable_ecc = enable ? fsmc_conf.enable_ecc_value :
+        fsmc_conf.disable_ecc_value;
+
+    *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = fsmc_conf.set_features_cmd;
+    *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = fsmc_conf.enable_ecc_addr;
+    *(__IO uint8_t *)(Bank_NAND_ADDR | DATA_AREA) = enable_ecc;
+    *(__IO uint8_t *)(Bank_NAND_ADDR | DATA_AREA) = 0;
+    *(__IO uint8_t *)(Bank_NAND_ADDR | DATA_AREA) = 0;
+    *(__IO uint8_t *)(Bank_NAND_ADDR | DATA_AREA) = 0;
+
+    return 0;
+}
+
 flash_hal_t hal_fsmc =
 {
     .init = nand_init,
@@ -479,6 +507,7 @@ flash_hal_t hal_fsmc =
     .read_spare_data = nand_read_spare_data,
     .write_page_async = nand_write_page_async,
     .read_status = nand_read_status,
-    .is_bb_supported = nand_is_bb_supported
+    .is_bb_supported = nand_is_bb_supported,
+    .enable_hw_ecc = nand_enable_hw_ecc,
 };
 
diff --git a/firmware/programmer/nand_programmer.c b/firmware/programmer/nand_programmer.c
@@ -76,6 +76,7 @@ typedef struct __attribute__((__packed__))
 {
     uint8_t skip_bb : 1;
     uint8_t inc_spare : 1;
+    uint8_t enable_hw_ecc: 1;
 } np_cmd_flags_t;
 
 typedef struct __attribute__((__packed__))
@@ -573,6 +574,10 @@ static int np_cmd_nand_write_start(np_prog_t *prog)
     }
 
     write_start_cmd = (np_write_start_cmd_t *)prog->rx_buf;
+
+    if (hal[prog->hal]->enable_hw_ecc)
+        hal[prog->hal]->enable_hw_ecc(write_start_cmd->flags.enable_hw_ecc);
+
     addr = write_start_cmd->addr;
     len = write_start_cmd->len;
 
diff --git a/qt/cmd.h b/qt/cmd.h
@@ -34,6 +34,7 @@ typedef struct __attribute__((__packed__))
 {
     uint8_t skipBB : 1;
     uint8_t incSpare : 1;
+    uint8_t enableHwEcc: 1;
 } CmdFlags;
 
 typedef struct __attribute__((__packed__))
diff --git a/qt/main_window.cpp b/qt/main_window.cpp
@@ -643,12 +643,15 @@ void MainWindow::slotSettingsProgrammer()
         prog->isSkipBB())).toBool());
     progDialog.setIncSpare((settings.value(SETTINGS_INCLUDE_SPARE_AREA,
         prog->isIncSpare())).toBool());
+    progDialog.setHwEccEnabled((settings.value(SETTINGS_ENABLE_HW_ECC,
+        prog->isHwEccEnabled())).toBool());
 
     if (progDialog.exec() == QDialog::Accepted)
     {
         settings.setValue(SETTINGS_USB_DEV_NAME, progDialog.getUsbDevName());
         settings.setValue(SETTINGS_SKIP_BAD_BLOCKS, progDialog.isSkipBB());
         settings.setValue(SETTINGS_INCLUDE_SPARE_AREA, progDialog.isIncSpare());
+        settings.setValue(SETTINGS_ENABLE_HW_ECC, progDialog.isHwEccEnabled());
         settings.sync();
 
         updateProgSettings();
@@ -668,6 +671,8 @@ void MainWindow::updateProgSettings()
         prog->setIncSpare(settings.value(SETTINGS_INCLUDE_SPARE_AREA).
             toBool());
     }
+    if (settings.contains(SETTINGS_ENABLE_HW_ECC))
+        prog->setHwEccEnabled(settings.value(SETTINGS_ENABLE_HW_ECC).toBool());
 }
 
 void MainWindow::slotSettingsParallelChipDb()
diff --git a/qt/nando_parallel_chip_db.csv b/qt/nando_parallel_chip_db.csv
@@ -1,18 +1,18 @@
-# name, page size, block size, total size, spare size, bad block mark off., tCS, tCLS, tALS, tCLR, tAR, tWP, tRP, tDS, tCH, tCLH, tALH, tWC, tRC, tREA, row cycles, col. cycles, read 1 cycle com., read 2 cycle com., read spare com., read ID com., reset com., write 1 cycle com., write 2 cycle com., erase 1 cycle com., erase 2 cycle com., status com., ID1, ID2, ID3, ID4, ID5
-K9F2G08U0C, 2048, 131072, 268435456, 64, 0, 20, 12, 12, 10, 10, 12, 12, 12, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, 236, 218, 16, 149, 68
-K9F1G08U0E, 2048, 131072, 134217728, 64, 0, 20, 12, 12, 10, 10, 12, 12, 12, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, 236, 241, 0, 149, 65
-K9F1208U0B, 512, 16384, 67108864, 16, 5, 0, 0, 0, 10, 10, 25, 25, 20, 10, 10, 10, 45, 50, 30, 3, 1, 0, -, -, 144, 255, 128, 16, 96, 208, 112, 236, 118, 165, 192, -
-K9G8G08U0A, 2048, 262144, 1073741824, 64, 0, 20, 12, 12, 10, 10, 12, 12, 12, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, 236, 211, 20, 165, 100
-K9G8G08U0M, 2048, 262144, 1073741824, 64, 0, 20, 15, 15, 10, 10, 15, 15, 15, 5, 5, 5, 30, 30, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, 236, 211, 20, 37, 100
-HY27US08281A, 512, 16384, 16777216, 16, 5, 0, 0, 0, 10, 10, 25, 25, 20, 10, 10, 10, 50, 50, 30, 2, 1, 0, -, 80, 144, 255, 128, 16, 96, 208, 112, 173, 115, -, -, -
-HY27US08561A, 512, 16384, 33554432, 16, 5, 0, 0, 0, 10, 10, 25, 25, 20, 10, 10, 10, 50, 50, 30, 2, 1, 0, -, 80, 144, 255, 128, 16, 96, 208, 112, 173, 117, -, -, -
-HY27US08121B, 512, 16384, 67108864, 16, 5, 0, 0, 0, 10, 10, 25, 25, 20, 10, 10, 10, 50, 50, 30, 3, 1, 0, -, 80, 144, 255, 128, 16, 96, 208, 112, 173, 118, -, -, -
-TC58NVG2S3E, 2048, 131072, 536870912, 64, 0, 20, 12, 12, 10, 10, 12, 12, 12, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, 152, 220, 144, 21, 118
-TC58NVG1S3E, 2048, 131072, 268435456, 64, 0, 20, 12, 12, 10, 10, 12, 12, 12, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, 152, 218, 144, 21, 118
-F59L2G81A, 2048, 131072, 268435456, 64, 0, 20, 12, 5, 10, 10, 12, 12, 12, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, 200, 218, 144, 149, 68
-MT29F2G08ABAEA, 2048, 131072, 268435456, 64, 0, 15, 10, 10, 10, 10, 10, 10, 7, 5, 5, 5, 20, 20, 16, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, 44, 218, 144, 149, -
-MT29F4G08ABAD, 2048, 131072, 536870912, 64, 0, 15, 10, 10, 10, 10, 10, 10, 7, 5, 5, 5, 20, 20, 16, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, 44, 220, 144, 149, -
-MX30LF2G18AC, 2048, 131072, 268435456, 64, 0, 15, 10, 10, 10, 10, 10, 10, 7, 5, 5, 5, 20, 20, 16, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, 194, 218, 144, 149, 6
-S34ML01G1, 2048, 131072, 134217728, 64, 0, 20, 10, 10, 10, 10, 12, 12, 10, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, 1, 241, 0, 29, -
-S34ML02G1, 2048, 131072, 268435456, 64, 0, 20, 10, 10, 10, 10, 12, 12, 10, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, 1, 218, 144, 149, 68
-S34ML04G1, 2048, 131072, 536870912, 64, 0, 20, 10, 10, 10, 10, 12, 12, 10, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, 1, 220, 144, 149, 84
+# name, page size, block size, total size, spare size, bad block mark off., tCS, tCLS, tALS, tCLR, tAR, tWP, tRP, tDS, tCH, tCLH, tALH, tWC, tRC, tREA, row cycles, col. cycles, read 1 cycle com., read 2 cycle com., read spare com., read ID com., reset com., write 1 cycle com., write 2 cycle com., erase 1 cycle com., erase 2 cycle com., status com., set feat. com., en. ECC addr, en. ECC val., dis. ECC val., ID1, ID2, ID3, ID4, ID5
+K9F2G08U0C, 2048, 131072, 268435456, 64, 0, 20, 12, 12, 10, 10, 12, 12, 12, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, -, -, -, -, 236, 218, 16, 149, 68
+K9F1G08U0E, 2048, 131072, 134217728, 64, 0, 20, 12, 12, 10, 10, 12, 12, 12, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, -, -, -, -, 236, 241, 0, 149, 65
+K9F1208U0B, 512, 16384, 67108864, 16, 5, 0, 0, 0, 10, 10, 25, 25, 20, 10, 10, 10, 45, 50, 30, 3, 1, 0, -, -, 144, 255, 128, 16, 96, 208, 112, -, -, -, -, 236, 118, 165, 192, -
+K9G8G08U0A, 2048, 262144, 1073741824, 64, 0, 20, 12, 12, 10, 10, 12, 12, 12, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, -, -, -, -, 236, 211, 20, 165, 100
+K9G8G08U0M, 2048, 262144, 1073741824, 64, 0, 20, 15, 15, 10, 10, 15, 15, 15, 5, 5, 5, 30, 30, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, -, -, -, -, 236, 211, 20, 37, 100
+HY27US08281A, 512, 16384, 16777216, 16, 5, 0, 0, 0, 10, 10, 25, 25, 20, 10, 10, 10, 50, 50, 30, 2, 1, 0, -, 80, 144, 255, 128, 16, 96, 208, 112, -, -, -, -, 173, 115, -, -, -
+HY27US08561A, 512, 16384, 33554432, 16, 5, 0, 0, 0, 10, 10, 25, 25, 20, 10, 10, 10, 50, 50, 30, 2, 1, 0, -, 80, 144, 255, 128, 16, 96, 208, 112, -, -, -, -, 173, 117, -, -, -
+HY27US08121B, 512, 16384, 67108864, 16, 5, 0, 0, 0, 10, 10, 25, 25, 20, 10, 10, 10, 50, 50, 30, 3, 1, 0, -, 80, 144, 255, 128, 16, 96, 208, 112, -, -, -, -, 173, 118, -, -, -
+TC58NVG2S3E, 2048, 131072, 536870912, 64, 0, 20, 12, 12, 10, 10, 12, 12, 12, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, -, -, -, -, 152, 220, 144, 21, 118
+TC58NVG1S3E, 2048, 131072, 268435456, 64, 0, 20, 12, 12, 10, 10, 12, 12, 12, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, -, -, -, -, 152, 218, 144, 21, 118
+F59L2G81A, 2048, 131072, 268435456, 64, 0, 20, 12, 5, 10, 10, 12, 12, 12, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, -, -, -, -, 200, 218, 144, 149, 68
+MT29F2G08ABAEA, 2048, 131072, 268435456, 64, 0, 15, 10, 10, 10, 10, 10, 10, 7, 5, 5, 5, 20, 20, 16, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, 239, 144, 8, 0, 44, 218, 144, 149, -
+MT29F4G08ABAD, 2048, 131072, 536870912, 64, 0, 15, 10, 10, 10, 10, 10, 10, 7, 5, 5, 5, 20, 20, 16, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, 239, 144, 8, 0, 44, 220, 144, 149, -
+MX30LF2G18AC, 2048, 131072, 268435456, 64, 0, 15, 10, 10, 10, 10, 10, 10, 7, 5, 5, 5, 20, 20, 16, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, -, -, -, -, 194, 218, 144, 149, 6
+S34ML01G1, 2048, 131072, 134217728, 64, 0, 20, 10, 10, 10, 10, 12, 12, 10, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, -, -, -, -, 1, 241, 0, 29, -
+S34ML02G1, 2048, 131072, 268435456, 64, 0, 20, 10, 10, 10, 10, 12, 12, 10, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, -, -, -, -, 1, 218, 144, 149, 68
+S34ML04G1, 2048, 131072, 536870912, 64, 0, 20, 10, 10, 10, 10, 12, 12, 10, 5, 5, 5, 25, 25, 20, 3, 2, 0, 48, -, 144, 255, 128, 16, 96, 208, 112, -, -, -, -, 1, 220, 144, 149, 84
diff --git a/qt/parallel_chip_db.h b/qt/parallel_chip_db.h
@@ -60,6 +60,10 @@ class ParallelChipDb : public ChipDb
         CHIP_PARAM_ERASE1_CMD,
         CHIP_PARAM_ERASE2_CMD,
         CHIP_PARAM_STATUS_CMD,
+        CHIP_PARAM_SET_FEATURE_CMD,
+        CHIP_PARAM_ENABLE_HW_ECC_ADDR,
+        CHIP_PARAM_ENABLE_HW_ECC_VALUE,
+        CHIP_PARAM_DISABLE_HW_ECC_VALUE,
         CHIP_PARAM_ID1,
         CHIP_PARAM_ID2,
         CHIP_PARAM_ID3,
diff --git a/qt/parallel_chip_db_dialog.cpp b/qt/parallel_chip_db_dialog.cpp
@@ -6,8 +6,8 @@
 #include "parallel_chip_db_dialog.h"
 #include "ui_parallel_chip_db_dialog.h"
 
-#define HEADER_LONG_WIDTH 120
-#define HEADER_MED_WIDTH 110
+#define HEADER_LONG_WIDTH 130
+#define HEADER_MED_WIDTH 120
 #define HEADER_SHORT_WIDTH 50
 
 ParallelChipDbDialog::ParallelChipDbDialog(ParallelChipDb *chipDb,
@@ -41,7 +41,7 @@ ParallelChipDbDialog::ParallelChipDbDialog(ParallelChipDb *chipDb,
         ui->chipDbTableView->setColumnWidth(i, HEADER_SHORT_WIDTH);
     }
     for (int i = ParallelChipDb::CHIP_PARAM_ROW_CYCLES;
-         i <= ParallelChipDb::CHIP_PARAM_STATUS_CMD; i++)
+         i <= ParallelChipDb::CHIP_PARAM_DISABLE_HW_ECC_VALUE; i++)
     {
         ui->chipDbTableView->setColumnWidth(i, HEADER_MED_WIDTH);
     }
diff --git a/qt/parallel_chip_db_table_model.cpp b/qt/parallel_chip_db_table_model.cpp
@@ -145,6 +145,22 @@ QVariant ParallelChipDbTableModel::data(const QModelIndex &index,
         chipDb->getHexStringFromParam(chipDb->getChipParam(index.row(),
             ParallelChipInfo::CHIP_PARAM_STATUS_CMD), paramStr);
         return paramStr;
+    case ParallelChipDb::CHIP_PARAM_SET_FEATURE_CMD:
+        chipDb->getHexStringFromOptParam(chipDb->getChipParam(index.row(),
+            ParallelChipInfo::CHIP_PARAM_SET_FEATURE_CMD), paramStr);
+        return paramStr;
+    case ParallelChipDb::CHIP_PARAM_ENABLE_HW_ECC_ADDR:
+        chipDb->getHexStringFromOptParam(chipDb->getChipParam(index.row(),
+            ParallelChipInfo::CHIP_PARAM_ENABLE_HW_ECC_ADDR), paramStr);
+        return paramStr;
+    case ParallelChipDb::CHIP_PARAM_ENABLE_HW_ECC_VALUE:
+        chipDb->getHexStringFromOptParam(chipDb->getChipParam(index.row(),
+            ParallelChipInfo::CHIP_PARAM_ENABLE_HW_ECC_VALUE), paramStr);
+        return paramStr;
+    case ParallelChipDb::CHIP_PARAM_DISABLE_HW_ECC_VALUE:
+        chipDb->getHexStringFromOptParam(chipDb->getChipParam(index.row(),
+            ParallelChipInfo::CHIP_PARAM_DISABLE_HW_ECC_VALUE), paramStr);
+        return paramStr;
     case ParallelChipDb::CHIP_PARAM_ID1:
         chipDb->getHexStringFromParam(chipDb->getChipParam(index.row(),
             ParallelChipInfo::CHIP_PARAM_ID1), paramStr);
@@ -241,6 +257,14 @@ QVariant ParallelChipDbTableModel::headerData(int section,
             return tr("Erase 2 com.");
         case ParallelChipDb::CHIP_PARAM_STATUS_CMD:
             return tr("Status com.");
+        case ParallelChipDb::CHIP_PARAM_SET_FEATURE_CMD:
+            return tr("Set feat. com.");
+        case ParallelChipDb::CHIP_PARAM_ENABLE_HW_ECC_ADDR:
+            return tr("En. HW ECC addr.");
+        case ParallelChipDb::CHIP_PARAM_ENABLE_HW_ECC_VALUE:
+            return tr("En. HW ECC val.");
+        case ParallelChipDb::CHIP_PARAM_DISABLE_HW_ECC_VALUE:
+            return tr("Dis. HW ECC val.");
         case ParallelChipDb::CHIP_PARAM_ID1:
             return tr("ID 1");
         case ParallelChipDb::CHIP_PARAM_ID2:
@@ -324,6 +348,14 @@ QVariant ParallelChipDbTableModel::headerData(int section,
             return tr("Erase 2 cycle command");
         case ParallelChipDb::CHIP_PARAM_STATUS_CMD:
             return tr("Status command");
+        case ParallelChipDb::CHIP_PARAM_SET_FEATURE_CMD:
+            return tr("Set feature command");
+        case ParallelChipDb::CHIP_PARAM_ENABLE_HW_ECC_ADDR:
+            return tr("Enable HW ECC address");
+        case ParallelChipDb::CHIP_PARAM_ENABLE_HW_ECC_VALUE:
+            return tr("Enable HW ECC value");
+        case ParallelChipDb::CHIP_PARAM_DISABLE_HW_ECC_VALUE:
+            return tr("Disable HW ECC value");
         case ParallelChipDb::CHIP_PARAM_ID1:
             return tr("Chip ID 1st byte");
         case ParallelChipDb::CHIP_PARAM_ID2:
@@ -571,6 +603,38 @@ bool ParallelChipDbTableModel::setData(const QModelIndex &index,
         chipDb->setChipParam(index.row(),
             ParallelChipInfo::CHIP_PARAM_STATUS_CMD, paramVal);
         return true;
+    case ParallelChipDb::CHIP_PARAM_SET_FEATURE_CMD:
+        if (chipDb->getOptParamFromHexString(value.toString(), paramVal))
+            return false;
+        if (!chipDb->isOptParamValid(paramVal, 0x00, 0xFF))
+            return false;
+        chipDb->setChipParam(index.row(),
+            ParallelChipInfo::CHIP_PARAM_SET_FEATURE_CMD, paramVal);
+        return true;
+    case ParallelChipDb::CHIP_PARAM_ENABLE_HW_ECC_ADDR:
+        if (chipDb->getOptParamFromHexString(value.toString(), paramVal))
+            return false;
+        if (!chipDb->isOptParamValid(paramVal, 0x00, 0xFF))
+            return false;
+        chipDb->setChipParam(index.row(),
+            ParallelChipInfo::CHIP_PARAM_ENABLE_HW_ECC_ADDR, paramVal);
+        return true;
+    case ParallelChipDb::CHIP_PARAM_ENABLE_HW_ECC_VALUE:
+        if (chipDb->getOptParamFromHexString(value.toString(), paramVal))
+            return false;
+        if (!chipDb->isOptParamValid(paramVal, 0x00, 0xFF))
+            return false;
+        chipDb->setChipParam(index.row(),
+            ParallelChipInfo::CHIP_PARAM_ENABLE_HW_ECC_VALUE, paramVal);
+        return true;
+    case ParallelChipDb::CHIP_PARAM_DISABLE_HW_ECC_VALUE:
+        if (chipDb->getOptParamFromHexString(value.toString(), paramVal))
+            return false;
+        if (!chipDb->isOptParamValid(paramVal, 0x00, 0xFF))
+            return false;
+        chipDb->setChipParam(index.row(),
+            ParallelChipInfo::CHIP_PARAM_DISABLE_HW_ECC_VALUE, paramVal);
+        return true;
     case ParallelChipDb::CHIP_PARAM_ID1:
         if (chipDb->getParamFromHexString(value.toString(), paramVal))
             return false;
diff --git a/qt/parallel_chip_info.cpp b/qt/parallel_chip_info.cpp
@@ -29,6 +29,10 @@ typedef struct __attribute__((__packed__))
     uint8_t erase1Cmd;
     uint8_t erase2Cmd;
     uint8_t statusCmd;
+    uint8_t setFeaturesCmd;
+    uint8_t enableEccAddr;
+    uint8_t enableEccValue;
+    uint8_t disableEccValue;
 } Conf;
 
 ParallelChipInfo::ParallelChipInfo()
@@ -133,6 +137,13 @@ const QByteArray &ParallelChipInfo::getHalConf()
     conf.erase1Cmd = static_cast<uint8_t>(params[CHIP_PARAM_ERASE1_CMD]);
     conf.erase2Cmd = static_cast<uint8_t>(params[CHIP_PARAM_ERASE2_CMD]);
     conf.statusCmd = static_cast<uint8_t>(params[CHIP_PARAM_STATUS_CMD]);
+    conf.setFeaturesCmd = static_cast<uint8_t>(params[CHIP_PARAM_STATUS_CMD]);
+    conf.enableEccAddr =
+        static_cast<uint8_t>(params[CHIP_PARAM_ENABLE_HW_ECC_ADDR]);
+    conf.enableEccValue =
+        static_cast<uint8_t>(params[CHIP_PARAM_ENABLE_HW_ECC_VALUE]);
+    conf.disableEccValue =
+        static_cast<uint8_t>(params[CHIP_PARAM_DISABLE_HW_ECC_VALUE]);
 
     halConf.clear();
     halConf.append(reinterpret_cast<const char *>(&conf), sizeof(conf));
diff --git a/qt/parallel_chip_info.h b/qt/parallel_chip_info.h
@@ -39,6 +39,10 @@ class ParallelChipInfo : public ChipInfo
         CHIP_PARAM_ERASE1_CMD,
         CHIP_PARAM_ERASE2_CMD,
         CHIP_PARAM_STATUS_CMD,
+        CHIP_PARAM_SET_FEATURE_CMD,
+        CHIP_PARAM_ENABLE_HW_ECC_ADDR,
+        CHIP_PARAM_ENABLE_HW_ECC_VALUE,
+        CHIP_PARAM_DISABLE_HW_ECC_VALUE,
         CHIP_PARAM_ID1,
         CHIP_PARAM_ID2,
         CHIP_PARAM_ID3,
diff --git a/qt/programmer.cpp b/qt/programmer.cpp
@@ -134,6 +134,16 @@ void Programmer::setIncSpare(bool isIncSpare)
     incSpare = isIncSpare;
 }
 
+bool Programmer::isHwEccEnabled()
+{
+    return enableHwEcc;
+}
+
+void Programmer::setHwEccEnabled(bool isHwEccEnabled)
+{
+    enableHwEcc = isHwEccEnabled;
+}
+
 void Programmer::readChipIdCb(int ret)
 {
     QTimer::singleShot(0, &reader, &Reader::stop);
@@ -259,7 +269,8 @@ void Programmer::writeChip(uint8_t *buf, uint32_t addr, uint32_t len,
         SLOT(writeProgressCb(unsigned int)));
 
     writer.init(usbDevName, SERIAL_PORT_SPEED, buf, addr, len, pageSize,
-        skipBB, incSpare, CMD_NAND_WRITE_S, CMD_NAND_WRITE_D, CMD_NAND_WRITE_E);
+        skipBB, incSpare, enableHwEcc, CMD_NAND_WRITE_S, CMD_NAND_WRITE_D,
+        CMD_NAND_WRITE_E);
     writer.start();
 }
 
@@ -448,7 +459,8 @@ void Programmer::firmwareUpdateStart()
     writer.init(usbDevName, SERIAL_PORT_SPEED,
         reinterpret_cast<uint8_t *>(firmwareBuffer),
         firmwareImage[updateImage].address, firmwareImage[updateImage].size,
-        flashPageSize, 0, 0, CMD_FW_UPDATE_S, CMD_FW_UPDATE_D, CMD_FW_UPDATE_E);
+        flashPageSize, 0, 0, 0, CMD_FW_UPDATE_S, CMD_FW_UPDATE_D,
+        CMD_FW_UPDATE_E);
     writer.start();
 }
 
diff --git a/qt/programmer.h b/qt/programmer.h
@@ -51,6 +51,7 @@ class Programmer : public QObject
     bool isConn;
     bool skipBB;
     bool incSpare;
+    bool enableHwEcc;
     FwVersion fwVersion;
     uint8_t activeImage;
     uint8_t updateImage;
@@ -76,6 +77,8 @@ class Programmer : public QObject
     void setSkipBB(bool skip);
     bool isIncSpare();
     void setIncSpare(bool incSpare);
+    bool isHwEccEnabled();
+    void setHwEccEnabled(bool isHwEccEnabled);
     void readChipId(ChipId *chipId);
     void eraseChip(uint32_t addr, uint32_t len);
     void readChip(uint8_t *buf, uint32_t addr, uint32_t len, bool isReadLess);
diff --git a/qt/settings.h b/qt/settings.h
diff --git a/qt/settings_programmer_dialog.cpp b/qt/settings_programmer_dialog.cpp
diff --git a/qt/settings_programmer_dialog.h b/qt/settings_programmer_dialog.h
diff --git a/qt/settings_programmer_dialog.ui b/qt/settings_programmer_dialog.ui
diff --git a/qt/writer.cpp b/qt/writer.cpp
diff --git a/qt/writer.h b/qt/writer.h

Original file line number	Diff line number	Diff line change
`@@ -34,6 +34,7 @@ typedef struct __attribute__((__packed__))`
`34`	`34`	`{`
`35`	`35`	`uint8_t skipBB : 1;`
`36`	`36`	`uint8_t incSpare : 1;`
	`37`	`+ uint8_t enableHwEcc: 1;`
`37`	`38`	`} CmdFlags;`
`38`	`39`
`39`	`40`	`typedef struct __attribute__((__packed__))`
Original file line number	Diff line number	Diff line change
`@@ -6,8 +6,8 @@`
`6`	`6`	`#include "parallel_chip_db_dialog.h"`
`7`	`7`	`#include "ui_parallel_chip_db_dialog.h"`
`8`	`8`
`9`		`-#define HEADER_LONG_WIDTH 120`
`10`		`-#define HEADER_MED_WIDTH 110`
	`9`	`+#define HEADER_LONG_WIDTH 130`
	`10`	`+#define HEADER_MED_WIDTH 120`
`11`	`11`	`#define HEADER_SHORT_WIDTH 50`
`12`	`12`
`13`	`13`	`ParallelChipDbDialog::ParallelChipDbDialog(ParallelChipDb *chipDb,`
`@@ -41,7 +41,7 @@ ParallelChipDbDialog::ParallelChipDbDialog(ParallelChipDb *chipDb,`
`41`	`41`	`ui->chipDbTableView->setColumnWidth(i, HEADER_SHORT_WIDTH);`
`42`	`42`	`}`
`43`	`43`	`for (int i = ParallelChipDb::CHIP_PARAM_ROW_CYCLES;`
`44`		`- i <= ParallelChipDb::CHIP_PARAM_STATUS_CMD; i++)`
	`44`	`+ i <= ParallelChipDb::CHIP_PARAM_DISABLE_HW_ECC_VALUE; i++)`
`45`	`45`	`{`
`46`	`46`	`ui->chipDbTableView->setColumnWidth(i, HEADER_MED_WIDTH);`
`47`	`47`	`}`