@@ -37,6 +37,29 @@ static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
3737 */
3838static const int accel_scale [] = {598 , 1196 , 2392 , 4785 };
3939
40+ static const struct inv_mpu6050_reg_map reg_set_icm20948 = {
41+ .sample_rate_div = INV_ICM20948_REG_SAMPLE_RATE_DIV ,
42+ .lpf = INV_ICM20948_REG_GYRO_CONFIG ,
43+ .accel_lpf = INV_ICM20948_REG_ACCEL_CONFIG ,
44+ .user_ctrl = INV_ICM20948_REG_USER_CTRL ,
45+ .fifo_en = INV_ICM20948_REG_FIFO_EN ,
46+ .gyro_config = INV_ICM20948_REG_GYRO_CONFIG ,
47+ .accl_config = INV_ICM20948_REG_ACCEL_CONFIG ,
48+ .fifo_count_h = INV_ICM20948_REG_FIFO_COUNT_H ,
49+ .fifo_r_w = INV_ICM20948_REG_FIFO_R_W ,
50+ .raw_gyro = INV_ICM20948_REG_RAW_GYRO ,
51+ .raw_accl = INV_ICM20948_REG_RAW_ACCEL ,
52+ .temperature = INV_ICM20948_REG_TEMPERATURE ,
53+ .int_enable = INV_ICM20948_REG_INT_ENABLE ,
54+ .int_status = INV_ICM20948_REG_INT_STATUS ,
55+ .pwr_mgmt_1 = INV_ICM20948_REG_PWR_MGMT_1 ,
56+ .pwr_mgmt_2 = INV_ICM20948_REG_PWR_MGMT_2 ,
57+ .int_pin_cfg = INV_ICM20948_REG_INT_PIN_CFG ,
58+ .accl_offset = INV_ICM20948_REG_ACCEL_OFFSET ,
59+ .gyro_offset = INV_ICM20948_REG_GYRO_OFFSET ,
60+ .i2c_if = 0 ,
61+ };
62+
4063static const struct inv_mpu6050_reg_map reg_set_icm20602 = {
4164 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV ,
4265 .lpf = INV_MPU6050_REG_CONFIG ,
@@ -108,8 +131,8 @@ static const struct inv_mpu6050_chip_config chip_config_6050 = {
108131 .fsr = INV_MPU6050_FSR_2000DPS ,
109132 .lpf = INV_MPU6050_FILTER_20HZ ,
110133 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER (INV_MPU6050_INIT_FIFO_RATE ),
111- .gyro_fifo_enable = false ,
112- .accl_fifo_enable = false ,
134+ .gyro_fifo_enable = true ,
135+ .accl_fifo_enable = true ,
113136 .accl_fs = INV_MPU6050_FS_02G ,
114137 .user_ctrl = 0 ,
115138};
@@ -188,6 +211,14 @@ static const struct inv_mpu6050_hw hw_info[] = {
188211 .fifo_size = 1008 ,
189212 .temp = {INV_ICM20608_TEMP_OFFSET , INV_ICM20608_TEMP_SCALE },
190213 },
214+ {
215+ .whoami = 0 ,
216+ .name = "ICM20948" ,
217+ .reg = & reg_set_icm20948 ,
218+ .config = & chip_config_6050 ,
219+ .fifo_size = 4 * 1024 ,
220+ .temp = {INV_ICM20948_TEMP_OFFSET , INV_MPU6500_TEMP_SCALE },
221+ }
191222};
192223
193224int inv_mpu6050_switch_engine (struct inv_mpu6050_state * st , bool en , u32 mask )
@@ -286,7 +317,13 @@ static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
286317{
287318 int result ;
288319
289- result = regmap_write (st -> map , st -> reg -> lpf , val );
320+ switch (st -> chip_type ) {
321+ case INV_ICM20948 :
322+ result = regmap_update_bits (st -> map , st -> reg -> lpf , 0x7 << 3 , val << 3 );
323+ break ;
324+ default :
325+ result = regmap_write (st -> map , st -> reg -> lpf , val );
326+ }
290327 if (result )
291328 return result ;
292329
@@ -297,6 +334,9 @@ static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
297334 /* old chips, nothing to do */
298335 result = 0 ;
299336 break ;
337+ case INV_ICM20948 :
338+ result = regmap_update_bits (st -> map , st -> reg -> accel_lpf , 0x7 << 3 , val << 3 );
339+ break ;
300340 default :
301341 /* set accel lpf */
302342 result = regmap_write (st -> map , st -> reg -> accel_lpf , val );
@@ -324,8 +364,16 @@ static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
324364 result = inv_mpu6050_set_power_itg (st , true);
325365 if (result )
326366 return result ;
327- d = (INV_MPU6050_FSR_2000DPS << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT );
328- result = regmap_write (st -> map , st -> reg -> gyro_config , d );
367+
368+ switch (st -> chip_type ) {
369+ case INV_ICM20948 :
370+ d = (INV_MPU6050_FSR_2000DPS << 1 );
371+ result = regmap_update_bits (st -> map , st -> reg -> gyro_config , 0xf , d | 1 );
372+ break ;
373+ default :
374+ d = (INV_MPU6050_FSR_2000DPS << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT );
375+ result = regmap_write (st -> map , st -> reg -> gyro_config , d );
376+ }
329377 if (result )
330378 goto error_power_off ;
331379
@@ -338,8 +386,21 @@ static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
338386 if (result )
339387 goto error_power_off ;
340388
341- d = (INV_MPU6050_FS_02G << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT );
342- result = regmap_write (st -> map , st -> reg -> accl_config , d );
389+ if (st -> chip_type == INV_ICM20948 ) {
390+ result = regmap_write (st -> map , INV_ICM20948_REG_ACCEL_SAMPLE_RATE_DIV2 , d );
391+ if (result )
392+ goto error_power_off ;
393+ }
394+
395+ switch (st -> chip_type ) {
396+ case INV_ICM20948 :
397+ d = (INV_MPU6050_FS_02G << 1 );
398+ result = regmap_update_bits (st -> map , st -> reg -> accl_config , 0x7 << 1 , d );
399+ break ;
400+ default :
401+ d = (INV_MPU6050_FS_02G << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT );
402+ result = regmap_write (st -> map , st -> reg -> accl_config , d );
403+ }
343404 if (result )
344405 goto error_power_off ;
345406
@@ -531,8 +592,15 @@ static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val)
531592
532593 for (i = 0 ; i < ARRAY_SIZE (gyro_scale_6050 ); ++ i ) {
533594 if (gyro_scale_6050 [i ] == val ) {
534- d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT );
535- result = regmap_write (st -> map , st -> reg -> gyro_config , d );
595+ switch (st -> chip_type ) {
596+ case INV_ICM20948 :
597+ d = (INV_MPU6050_FSR_2000DPS << 1 );
598+ result = regmap_update_bits (st -> map , st -> reg -> gyro_config , 0x7 << 1 , d );
599+ break ;
600+ default :
601+ d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT );
602+ result = regmap_write (st -> map , st -> reg -> gyro_config , d );
603+ }
536604 if (result )
537605 return result ;
538606
@@ -569,8 +637,15 @@ static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val)
569637
570638 for (i = 0 ; i < ARRAY_SIZE (accel_scale ); ++ i ) {
571639 if (accel_scale [i ] == val ) {
572- d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT );
573- result = regmap_write (st -> map , st -> reg -> accl_config , d );
640+ switch (st -> chip_type ) {
641+ case INV_ICM20948 :
642+ d = (i << 1 );
643+ result = regmap_update_bits (st -> map , st -> reg -> accl_config , 0xf , d | 1 );
644+ break ;
645+ default :
646+ d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT );
647+ result = regmap_write (st -> map , st -> reg -> accl_config , d );
648+ }
574649 if (result )
575650 return result ;
576651
@@ -721,6 +796,12 @@ inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr,
721796 result = regmap_write (st -> map , st -> reg -> sample_rate_div , d );
722797 if (result )
723798 goto fifo_rate_fail_power_off ;
799+
800+ if (st -> chip_type == INV_ICM20948 ) {
801+ result = regmap_write (st -> map , INV_ICM20948_REG_ACCEL_SAMPLE_RATE_DIV2 , d );
802+ if (result )
803+ goto fifo_rate_fail_power_off ;
804+ }
724805 st -> chip_config .divider = d ;
725806
726807 result = inv_mpu6050_set_lpf (st , fifo_rate );
@@ -976,15 +1057,16 @@ static const struct iio_info mpu_info = {
9761057 */
9771058static int inv_check_and_setup_chip (struct inv_mpu6050_state * st )
9781059{
979- int result ;
980- unsigned int regval ;
1060+ int result = 0 ;
1061+ unsigned int regval = 0 ;
9811062 int i ;
9821063
9831064 st -> hw = & hw_info [st -> chip_type ];
9841065 st -> reg = hw_info [st -> chip_type ].reg ;
9851066
9861067 /* check chip self-identification */
987- result = regmap_read (st -> map , INV_MPU6050_REG_WHOAMI , & regval );
1068+ if (st -> hw -> whoami )
1069+ result = regmap_read (st -> map , INV_MPU6050_REG_WHOAMI , & regval );
9881070 if (result )
9891071 return result ;
9901072 if (regval != st -> hw -> whoami ) {
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