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beckusbeckus
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Merge timer peripheral from https://github.com/hankhank/qemu_stm32
Adding timer peripheral written by github user hankhank See http://lists.gnu.org/archive/html/qemu-devel/2014-07/msg02970.html
2 parents 5c983d7 + 00a769f commit 6d9adee

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6 files changed

+612
-2
lines changed

6 files changed

+612
-2
lines changed

‎hw/arm/stm32.c

Lines changed: 35 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -135,6 +135,28 @@ static void stm32_create_uart_dev(
135135
stm32_init_periph(uart_dev, periph, addr, irq);
136136
}
137137

138+
static void stm32_create_timer_dev(
139+
Object *stm32_container,
140+
stm32_periph_t periph,
141+
int timer_num,
142+
DeviceState *rcc_dev,
143+
DeviceState **gpio_dev,
144+
DeviceState *afio_dev,
145+
hwaddr addr,
146+
qemu_irq *irq,
147+
int num_irqs)
148+
{
149+
char child_name[9];
150+
DeviceState *timer_dev = qdev_create(NULL, "stm32-timer");
151+
QDEV_PROP_SET_PERIPH_T(timer_dev, "periph", periph);
152+
qdev_prop_set_ptr(timer_dev, "stm32_rcc", rcc_dev);
153+
qdev_prop_set_ptr(timer_dev, "stm32_gpio", gpio_dev);
154+
qdev_prop_set_ptr(timer_dev, "stm32_afio", afio_dev);
155+
snprintf(child_name, sizeof(child_name), "timer[%i]", timer_num);
156+
object_property_add_child(stm32_container, child_name, OBJECT(timer_dev), NULL);
157+
stm32_init_periph(timer_dev, periph, addr, irq, num_irqs);
158+
}
159+
138160

139161
void stm32_init(
140162
ram_addr_t flash_size,
@@ -181,7 +203,7 @@ void stm32_init(
181203
qdev_prop_set_uint32(rcc_dev, "osc_freq", osc_freq);
182204
qdev_prop_set_uint32(rcc_dev, "osc32_freq", osc32_freq);
183205
object_property_add_child(stm32_container, "rcc", OBJECT(rcc_dev), NULL);
184-
stm32_init_periph(rcc_dev, STM32_RCC_PERIPH, 0x40021000, pic[STM32_RCC_IRQ]);
206+
stm32_init_periph(rcc_dev, STM32_RCC, 0x40021000, pic[STM32_RCC_IRQ]);
185207

186208
DeviceState **gpio_dev = (DeviceState **)g_malloc0(sizeof(DeviceState *) * STM32_GPIO_COUNT);
187209
for(i = 0; i < STM32_GPIO_COUNT; i++) {
@@ -197,7 +219,7 @@ void stm32_init(
197219

198220
DeviceState *exti_dev = qdev_create(NULL, TYPE_STM32_EXTI);
199221
object_property_add_child(stm32_container, "exti", OBJECT(exti_dev), NULL);
200-
stm32_init_periph(exti_dev, STM32_EXTI_PERIPH, 0x40010400, NULL);
222+
stm32_init_periph(exti_dev, STM32_EXTI, 0x40010400, NULL);
201223
SysBusDevice *exti_busdev = SYS_BUS_DEVICE(exti_dev);
202224
sysbus_connect_irq(exti_busdev, 0, pic[STM32_EXTI0_IRQ]);
203225
sysbus_connect_irq(exti_busdev, 1, pic[STM32_EXTI1_IRQ]);
@@ -228,4 +250,15 @@ void stm32_init(
228250
stm32_create_uart_dev(stm32_container, STM32_UART3, 3, rcc_dev, gpio_dev, afio_dev, 0x40004800, pic[STM32_UART3_IRQ]);
229251
stm32_create_uart_dev(stm32_container, STM32_UART4, 4, rcc_dev, gpio_dev, afio_dev, 0x40004c00, pic[STM32_UART4_IRQ]);
230252
stm32_create_uart_dev(stm32_container, STM32_UART5, 5, rcc_dev, gpio_dev, afio_dev, 0x40005000, pic[STM32_UART5_IRQ]);
253+
254+
qemu_irq tim1_irqs[] = { pic[TIM1_BRK_IRQn], pic[TIM1_UP_IRQn], pic[TIM1_TRG_COM_IRQn],
255+
pic[TIM1_CC_IRQn]};
256+
stm32_create_timer_dev(stm32_container, STM32_TIM1, 1, rcc_dev, gpio_dev, afio_dev, 0x40012C00, tim1_irqs, 5);
257+
258+
stm32_create_timer_dev(stm32_container, STM32_TIM2, 1, rcc_dev, gpio_dev, afio_dev, 0x40000000, pic[TIM2_IRQn], 1);
259+
stm32_create_timer_dev(stm32_container, STM32_TIM3, 1, rcc_dev, gpio_dev, afio_dev, 0x40000400, pic[TIM3_IRQn], 1);
260+
stm32_create_timer_dev(stm32_container, STM32_TIM4, 1, rcc_dev, gpio_dev, afio_dev, 0x40000800, pic[TIM4_IRQn], 1);
261+
stm32_create_timer_dev(stm32_container, STM32_TIM5, 1, rcc_dev, gpio_dev, afio_dev, 0x40000C00, pic[TIM5_IRQn], 1);
262+
263+
231264
}

‎hw/arm/stm32_rcc.c

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -492,6 +492,11 @@ static void stm32_rcc_RCC_APB2ENR_write(Stm32Rcc *s, uint32_t new_value,
492492
stm32_rcc_periph_enable(s, new_value, init, STM32_GPIOF,
493493
RCC_APB2ENR_IOPFEN_BIT);
494494

495+
stm32_rcc_periph_enable(s, new_value, init, STM32_TIM1,
496+
RCC_APB2ENR_TIM1EN_BIT);
497+
stm32_rcc_periph_enable(s, new_value, init, STM32_TIM8,
498+
RCC_APB2ENR_TIM8EN_BIT);
499+
495500
s->RCC_APB2ENR = new_value & 0x0000fffd;
496501
}
497502

@@ -525,6 +530,19 @@ static void stm32_rcc_RCC_APB1ENR_write(Stm32Rcc *s, uint32_t new_value,
525530
stm32_rcc_periph_enable(s, new_value, init, STM32_UART2,
526531
RCC_APB1ENR_USART2EN_BIT);
527532

533+
stm32_rcc_periph_enable(s, new_value, init, STM32_TIM2,
534+
RCC_APB1ENR_TIM2EN_BIT);
535+
stm32_rcc_periph_enable(s, new_value, init, STM32_TIM3,
536+
RCC_APB1ENR_TIM3EN_BIT);
537+
stm32_rcc_periph_enable(s, new_value, init, STM32_TIM4,
538+
RCC_APB1ENR_TIM4EN_BIT);
539+
stm32_rcc_periph_enable(s, new_value, init, STM32_TIM5,
540+
RCC_APB1ENR_TIM5EN_BIT);
541+
stm32_rcc_periph_enable(s, new_value, init, STM32_TIM6,
542+
RCC_APB1ENR_TIM6EN_BIT);
543+
stm32_rcc_periph_enable(s, new_value, init, STM32_TIM7,
544+
RCC_APB1ENR_TIM7EN_BIT);
545+
528546
s->RCC_APB1ENR = new_value & 0x00005e7d;
529547
}
530548

@@ -862,6 +880,15 @@ static void stm32_rcc_init_clk(Stm32Rcc *s)
862880
s->PERIPHCLK[STM32_UART3] = clktree_create_clk("UART3", 1, 1, false, CLKTREE_NO_MAX_FREQ, 0, s->PCLK1, NULL);
863881
s->PERIPHCLK[STM32_UART4] = clktree_create_clk("UART4", 1, 1, false, CLKTREE_NO_MAX_FREQ, 0, s->PCLK1, NULL);
864882
s->PERIPHCLK[STM32_UART5] = clktree_create_clk("UART5", 1, 1, false, CLKTREE_NO_MAX_FREQ, 0, s->PCLK1, NULL);
883+
884+
s->PERIPHCLK[STM32_TIM1] = stm32_clktree_create_clk("TIM1", 1, 1, false, CLKTREE_NO_MAX_FREQ, 0, s->PCLK2, NULL);
885+
s->PERIPHCLK[STM32_TIM2] = stm32_clktree_create_clk("TIM2", 1, 1, false, CLKTREE_NO_MAX_FREQ, 0, s->PCLK1, NULL);
886+
s->PERIPHCLK[STM32_TIM3] = stm32_clktree_create_clk("TIM3", 1, 1, false, CLKTREE_NO_MAX_FREQ, 0, s->PCLK1, NULL);
887+
s->PERIPHCLK[STM32_TIM4] = stm32_clktree_create_clk("TIM4", 1, 1, false, CLKTREE_NO_MAX_FREQ, 0, s->PCLK1, NULL);
888+
s->PERIPHCLK[STM32_TIM5] = stm32_clktree_create_clk("TIM5", 1, 1, false, CLKTREE_NO_MAX_FREQ, 0, s->PCLK1, NULL);
889+
s->PERIPHCLK[STM32_TIM6] = stm32_clktree_create_clk("TIM6", 1, 1, false, CLKTREE_NO_MAX_FREQ, 0, s->PCLK1, NULL);
890+
s->PERIPHCLK[STM32_TIM7] = stm32_clktree_create_clk("TIM7", 1, 1, false, CLKTREE_NO_MAX_FREQ, 0, s->PCLK1, NULL);
891+
s->PERIPHCLK[STM32_TIM8] = stm32_clktree_create_clk("TIM8", 1, 1, false, CLKTREE_NO_MAX_FREQ, 0, s->PCLK2, NULL);
865892
}
866893

867894

‎hw/timer/Makefile.objs

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -31,3 +31,5 @@ obj-$(CONFIG_DIGIC) += digic-timer.o
3131
obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
3232

3333
obj-$(CONFIG_ALLWINNER_A10_PIT) += allwinner-a10-pit.o
34+
35+
obj-$(CONFIG_STM32) += stm32_timer.o

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