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6 files changed

+225
-139
lines changed

6 files changed

+225
-139
lines changed

hw/arm/stm32.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -263,6 +263,12 @@ void stm32_init(
263263
pic[TIM1_CC_IRQn]};
264264
stm32_create_timer_dev(stm32_container, STM32_TIM1, 1, rcc_dev, gpio_dev, afio_dev, 0x40012C00, tim1_irqs, 5);
265265

266+
stm32_create_timer_dev(stm32_container, STM32_TIM2, 1, rcc_dev, gpio_dev, afio_dev, 0x40000000, pic[TIM2_IRQn], 1);
267+
stm32_create_timer_dev(stm32_container, STM32_TIM3, 1, rcc_dev, gpio_dev, afio_dev, 0x40000400, pic[TIM3_IRQn], 1);
268+
stm32_create_timer_dev(stm32_container, STM32_TIM4, 1, rcc_dev, gpio_dev, afio_dev, 0x40000800, pic[TIM4_IRQn], 1);
266269
stm32_create_timer_dev(stm32_container, STM32_TIM5, 1, rcc_dev, gpio_dev, afio_dev, 0x40000C00, pic[TIM5_IRQn], 1);
270+
271+
267272
}
268273

274+

hw/arm/stm32_clktree.c

Lines changed: 27 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -59,23 +59,23 @@ struct Stm32Clk {
5959
struct Stm32Clk *input[CLKTREE_MAX_INPUT];
6060
};
6161

62-
static void stm32clktree_recalc_output_freq(Stm32Clk clk);
62+
static void stm32_clktree_recalc_output_freq(Stm32Clk clk);
6363

6464

6565

6666

6767
/* HELPER FUNCTIONS */
6868

69-
static Stm32Clk stm32clktree_get_input_clk(Stm32Clk clk)
69+
static Stm32Clk stm32_clktree_get_input_clk(Stm32Clk clk)
7070
{
7171
return clk->input[clk->selected_input + 1];
7272
}
7373

7474
#ifdef DEBUG_CLKTREE
7575

76-
static void stm32clktree_print_state(Stm32Clk clk)
76+
static void stm32_clktree_print_state(Stm32Clk clk)
7777
{
78-
Stm32Clk input_clk = stm32clktree_get_input_clk(clk);
78+
Stm32Clk input_clk = stm32_clktree_get_input_clk(clk);
7979

8080
printf("STM32_CLKTREE: %s Output Change (SrcStm32Clk:%s InFreq:%lu OutFreq:%lu Mul:%u Div:%u Enabled:%c)\n",
8181
clk->name,
@@ -88,16 +88,16 @@ static void stm32clktree_print_state(Stm32Clk clk)
8888
}
8989
#endif
9090

91-
static void stm32clktree_set_input_freq(Stm32Clk clk, uint32_t input_freq)
91+
static void stm32_clktree_set_input_freq(Stm32Clk clk, uint32_t input_freq)
9292
{
9393
clk->input_freq = input_freq;
9494

95-
stm32clktree_recalc_output_freq(clk);
95+
stm32_clktree_recalc_output_freq(clk);
9696
}
9797

9898
/* Recalculates the output frequency based on the clock's input_freq variable.
9999
*/
100-
static void stm32clktree_recalc_output_freq(Stm32Clk clk) {
100+
static void stm32_clktree_recalc_output_freq(Stm32Clk clk) {
101101
int i;
102102
Stm32Clk next_clk, next_clk_input;
103103
uint32_t new_output_freq;
@@ -114,7 +114,7 @@ static void stm32clktree_recalc_output_freq(Stm32Clk clk) {
114114
clk->output_freq = new_output_freq;
115115

116116
#ifdef DEBUG_CLKTREE
117-
stm32clktree_print_state(clk);
117+
stm32_clktree_print_state(clk);
118118
#endif
119119

120120
/* Check the new frequency against the max frequency. */
@@ -139,20 +139,20 @@ static void stm32clktree_recalc_output_freq(Stm32Clk clk) {
139139
/* Only propagate the change if the child has selected the current
140140
* clock as input.
141141
*/
142-
next_clk_input = stm32clktree_get_input_clk(next_clk);
142+
next_clk_input = stm32_clktree_get_input_clk(next_clk);
143143
if(next_clk_input == clk) {
144144
/* Recursively propagate changes. The clock tree should not be
145145
* too deep, so we shouldn't have to recurse too many times.
146146
*/
147-
stm32clktree_set_input_freq(next_clk, new_output_freq);
147+
stm32_clktree_set_input_freq(next_clk, new_output_freq);
148148
}
149149
}
150150
}
151151
}
152152

153153

154154
/* Generic create routine used by the public create routines. */
155-
static Stm32Clk stm32clktree_create_generic(
155+
static Stm32Clk stm32_clktree_create_generic(
156156
const char *name,
157157
uint16_t multiplier,
158158
uint16_t divisor,
@@ -191,17 +191,17 @@ static Stm32Clk stm32clktree_create_generic(
191191

192192

193193
/* PUBLIC FUNCTIONS */
194-
bool stm32clktree_is_enabled(Stm32Clk clk)
194+
bool stm32_clktree_is_enabled(Stm32Clk clk)
195195
{
196196
return clk->enabled;
197197
}
198198

199-
uint32_t stm32clktree_get_output_freq(Stm32Clk clk)
199+
uint32_t stm32_clktree_get_output_freq(Stm32Clk clk)
200200
{
201201
return clk->output_freq;
202202
}
203203

204-
void stm32clktree_adduser(Stm32Clk clk, qemu_irq user)
204+
void stm32_clktree_adduser(Stm32Clk clk, qemu_irq user)
205205
{
206206
CLKTREE_ADD_LINK(
207207
clk->user,
@@ -211,22 +211,22 @@ void stm32clktree_adduser(Stm32Clk clk, qemu_irq user)
211211
}
212212

213213

214-
Stm32Clk stm32clktree_create_src_clk(
214+
Stm32Clk stm32_clktree_create_src_clk(
215215
const char *name,
216216
uint32_t src_freq,
217217
bool enabled)
218218
{
219219
Stm32Clk clk;
220220

221-
clk = stm32clktree_create_generic(name, 1, 1, enabled);
221+
clk = stm32_clktree_create_generic(name, 1, 1, enabled);
222222

223-
stm32clktree_set_input_freq(clk, src_freq);
223+
stm32_clktree_set_input_freq(clk, src_freq);
224224

225225
return clk;
226226
}
227227

228228

229-
Stm32Clk stm32clktree_create_clk(
229+
Stm32Clk stm32_clktree_create_clk(
230230
const char *name,
231231
uint16_t multiplier,
232232
uint16_t divisor,
@@ -238,7 +238,7 @@ Stm32Clk stm32clktree_create_clk(
238238
va_list input_clks;
239239
Stm32Clk clk, input_clk;
240240

241-
clk = stm32clktree_create_generic(name, multiplier, divisor, enabled);
241+
clk = stm32_clktree_create_generic(name, multiplier, divisor, enabled);
242242

243243
/* Add the input clock connections. */
244244
va_start(input_clks, selected_input);
@@ -256,30 +256,30 @@ Stm32Clk stm32clktree_create_clk(
256256
CLKTREE_MAX_OUTPUT);
257257
}
258258

259-
stm32clktree_set_selected_input(clk, selected_input);
259+
stm32_clktree_set_selected_input(clk, selected_input);
260260

261261
return clk;
262262
}
263263

264264

265-
void stm32clktree_set_scale(Stm32Clk clk, uint16_t multiplier, uint16_t divisor)
265+
void stm32_clktree_set_scale(Stm32Clk clk, uint16_t multiplier, uint16_t divisor)
266266
{
267267
clk->multiplier = multiplier;
268268
clk->divisor = divisor;
269269

270-
stm32clktree_recalc_output_freq(clk);
270+
stm32_clktree_recalc_output_freq(clk);
271271
}
272272

273273

274-
void stm32clktree_set_enabled(Stm32Clk clk, bool enabled)
274+
void stm32_clktree_set_enabled(Stm32Clk clk, bool enabled)
275275
{
276276
clk->enabled = enabled;
277277

278-
stm32clktree_recalc_output_freq(clk);
278+
stm32_clktree_recalc_output_freq(clk);
279279
}
280280

281281

282-
void stm32clktree_set_selected_input(Stm32Clk clk, int selected_input)
282+
void stm32_clktree_set_selected_input(Stm32Clk clk, int selected_input)
283283
{
284284
uint32_t input_freq;
285285

@@ -290,10 +290,10 @@ void stm32clktree_set_selected_input(Stm32Clk clk, int selected_input)
290290
/* Get the input clock frequency. If there is no input, this should be 0.
291291
*/
292292
if(selected_input > -1) {
293-
input_freq = stm32clktree_get_input_clk(clk)->output_freq;
293+
input_freq = stm32_clktree_get_input_clk(clk)->output_freq;
294294
} else {
295295
input_freq = 0;
296296
}
297297

298-
stm32clktree_set_input_freq(clk, input_freq);
298+
stm32_clktree_set_input_freq(clk, input_freq);
299299
}

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