Updated spirv-cross.

Author: bkaradzic

3rdparty/spirv-cross/spirv_cfg.cpp

@@ -59,20 +59,26 @@ void CFG::build_immediate_dominators()
 	for (auto i = post_order.size(); i; i--)
 	{
 		uint32_t block = post_order[i - 1];
-		auto &pred = preceding_edges[block];
-		if (pred.empty()) // This is for the entry block, but we've already set up the dominators.
-			continue;
 
-		for (auto &edge : pred)
+		const auto resolve_preds = [&](const SmallVector<uint32_t> &pred)
 		{
-			if (immediate_dominators[block])
+			if (pred.empty()) // This is for the entry block, but we've already set up the dominators.
+				return;
+
+			for (auto &edge : pred)
 			{
-				assert(immediate_dominators[edge]);
-				immediate_dominators[block] = find_common_dominator(immediate_dominators[block], edge);
+				if (immediate_dominators[block])
+				{
+					assert(immediate_dominators[edge]);
+					immediate_dominators[block] = find_common_dominator(immediate_dominators[block], edge);
+				}
+				else
+					immediate_dominators[block] = edge;
 			}
-			else
-				immediate_dominators[block] = edge;
-		}
+		};
+
+		resolve_preds(preceding_edges[block]);
+		resolve_preds(virtual_dominance_preceding_edges[block]);
 	}
 }
 
@@ -193,6 +199,13 @@ void CFG::post_order_visit_resolve(uint32_t block_id)
 	if (block.merge == SPIRBlock::MergeLoop && !is_back_edge(block.merge_block))
 		add_branch(block_id, block.merge_block);
 
+	// Similar case as do/while loops, but expressed in a different form.
+	// if (true) { foo = 1; } else { return/unreachable/kill/blah; } access(foo);
+	// Only consider this branch when computing dominance to avoid breaking other analysis like
+	// parameter preservation.
+	if (block.merge == SPIRBlock::MergeSelection && !is_back_edge(block.next_block))
+		add_virtual_dominance_branch(block_id, block.next_block);
+
 	// First visit our branch targets.
 	switch (block.terminator)
 	{
@@ -289,18 +302,26 @@ void CFG::build_post_order_visit_order()
 	post_order_visit_entry(block);
 }
 
+static void add_unique(SmallVector <uint32_t> &l, uint32_t value)
+{
+	auto itr = find(begin(l), end(l), value);
+	if (itr == end(l))
+		l.push_back(value);
+}
+
 void CFG::add_branch(uint32_t from, uint32_t to)
 {
 	assert(from && to);
-	const auto add_unique = [](SmallVector<uint32_t> &l, uint32_t value) {
-		auto itr = find(begin(l), end(l), value);
-		if (itr == end(l))
-			l.push_back(value);
-	};
 	add_unique(preceding_edges[to], from);
 	add_unique(succeeding_edges[from], to);
 }
 
+void CFG::add_virtual_dominance_branch(uint32_t from, uint32_t to)
+{
+	assert(from && to);
+	add_unique(virtual_dominance_preceding_edges[to], from);
+}
+
 uint32_t CFG::find_loop_dominator(uint32_t block_id) const
 {
 	while (block_id != SPIRBlock::NoDominator)

3rdparty/spirv-cross/spirv_cfg.hpp

@@ -122,13 +122,15 @@ class CFG
 	Compiler &compiler;
 	const SPIRFunction &func;
 	std::unordered_map<uint32_t, SmallVector<uint32_t>> preceding_edges;
+	std::unordered_map<uint32_t, SmallVector<uint32_t>> virtual_dominance_preceding_edges;
 	std::unordered_map<uint32_t, SmallVector<uint32_t>> succeeding_edges;
 	std::unordered_map<uint32_t, uint32_t> immediate_dominators;
 	std::unordered_map<uint32_t, VisitOrder> visit_order;
 	SmallVector<uint32_t> post_order;
 	SmallVector<uint32_t> empty_vector;
 
 	void add_branch(uint32_t from, uint32_t to);
+	void add_virtual_dominance_branch(uint32_t from, uint32_t to);
 	void build_post_order_visit_order();
 	void build_immediate_dominators();
 	void post_order_visit_branches(uint32_t block);

3rdparty/spirv-cross/spirv_glsl.cpp

@@ -1335,9 +1335,6 @@ void CompilerGLSL::emit_struct(SPIRType &type)
 		emitted = true;
 	}
 
-	if (has_extended_decoration(type.self, SPIRVCrossDecorationPaddingTarget))
-		emit_struct_padding_target(type);
-
 	end_scope_decl();
 
 	if (emitted)
@@ -10872,6 +10869,15 @@ string CompilerGLSL::access_chain_internal(uint32_t base, const uint32_t *indice
 				access_meshlet_position_y = true;
 			}
 
+			if (get<SPIRType>(type->parent_type).op == OpTypeStruct &&
+			    has_decoration(type->parent_type, DecorationArrayStride))
+			{
+				uint32_t native_stride = get_decoration(type->parent_type, DecorationArrayStride);
+				uint32_t array_stride = get_decoration(type_id, DecorationArrayStride);
+				if (native_stride != array_stride)
+					expr += ".data";
+			}
+
 			type_id = type->parent_type;
 			type = &get<SPIRType>(type_id);
 
@@ -10957,6 +10963,7 @@ string CompilerGLSL::access_chain_internal(uint32_t base, const uint32_t *indice
 				physical_type = 0;
 
 			row_major_matrix_needs_conversion = member_is_non_native_row_major_matrix(*type, index);
+			type_id = type->member_types[index];
 			type = &get<SPIRType>(type->member_types[index]);
 		}
 		// Matrix -> Vector
@@ -11168,9 +11175,9 @@ string CompilerGLSL::to_flattened_struct_member(const string &basename, const SP
 	return ret;
 }
 
-uint32_t CompilerGLSL::get_physical_type_stride(const SPIRType &) const
+uint32_t CompilerGLSL::get_physical_type_id_stride(TypeID) const
 {
-	SPIRV_CROSS_THROW("Invalid to call get_physical_type_stride on a backend without native pointer support.");
+	SPIRV_CROSS_THROW("Invalid to call get_physical_type_id_stride on a backend without native pointer support.");
 }
 
 string CompilerGLSL::access_chain(uint32_t base, const uint32_t *indices, uint32_t count, const SPIRType &target_type,
@@ -11231,13 +11238,13 @@ string CompilerGLSL::access_chain(uint32_t base, const uint32_t *indices, uint32
 				// If there is a mismatch we have to go via 64-bit pointer arithmetic :'(
 				// Using packed hacks only gets us so far, and is not designed to deal with pointer to
 				// random values. It works for structs though.
-				auto &pointee_type = get_pointee_type(get<SPIRType>(type_id));
-				uint32_t physical_stride = get_physical_type_stride(pointee_type);
+				TypeID pointee_type_id = get_pointee_type_id(type_id);
+				uint32_t physical_stride = get_physical_type_id_stride(pointee_type_id);
 				uint32_t requested_stride = get_decoration(type_id, DecorationArrayStride);
 				if (physical_stride != requested_stride)
 				{
 					flags |= ACCESS_CHAIN_PTR_CHAIN_POINTER_ARITH_BIT;
-					if (is_vector(pointee_type))
+					if (is_vector(get<SPIRType>(pointee_type_id)))
 						flags |= ACCESS_CHAIN_PTR_CHAIN_CAST_TO_SCALAR_BIT;
 				}
 			}
@@ -16338,10 +16345,6 @@ void CompilerGLSL::emit_struct_member(const SPIRType &type, uint32_t member_type
 	          variable_decl(membertype, to_member_name(type, index)), ";");
 }
 
-void CompilerGLSL::emit_struct_padding_target(const SPIRType &)
-{
-}
-
 string CompilerGLSL::flags_to_qualifiers_glsl(const SPIRType &type, uint32_t id, const Bitset &flags)
 {
 	// GL_EXT_buffer_reference variables can be marked as restrict.

3rdparty/spirv-cross/spirv_glsl.hpp

@@ -447,7 +447,6 @@ class CompilerGLSL : public Compiler
 	virtual std::string builtin_to_glsl(BuiltIn builtin, StorageClass storage);
 	virtual void emit_struct_member(const SPIRType &type, uint32_t member_type_id, uint32_t index,
 	                                const std::string &qualifier = "", uint32_t base_offset = 0);
-	virtual void emit_struct_padding_target(const SPIRType &type);
 	virtual std::string image_type_glsl(const SPIRType &type, uint32_t id = 0, bool member = false);
 	std::string constant_expression(const SPIRConstant &c,
 	                                bool inside_block_like_struct_scope = false,
@@ -773,7 +772,7 @@ class CompilerGLSL : public Compiler
 
 	// Only meaningful on backends with physical pointer support ala MSL.
 	// Relevant for PtrAccessChain / BDA.
-	virtual uint32_t get_physical_type_stride(const SPIRType &type) const;
+	virtual uint32_t get_physical_type_id_stride(TypeID type_id) const;
 
 	StorageClass get_expression_effective_storage_class(uint32_t ptr);
 	virtual bool access_chain_needs_stage_io_builtin_translation(uint32_t base);