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hosted/ftdi: Implement unoptimized jtagtap_cycle
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src/platforms/hosted/ftdi_jtag.c

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,7 @@ static void ftdi_jtag_reset(void);
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static void ftdi_jtag_tms_seq(uint32_t tms_states, size_t clock_cycles);
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static void ftdi_jtag_tdi_seq(bool final_tms, const uint8_t *data_in, size_t clock_cycles);
3535
static bool ftdi_jtag_next(bool tms, bool tdi);
36+
static void ftdi_jtag_cycle(bool tms, bool tdi, size_t clock_cycles);
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/*
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* Throughout this file you will see command buffers being built which have the following basic form:
@@ -78,6 +79,7 @@ bool ftdi_jtag_init(void)
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jtag_proc.jtagtap_tms_seq = ftdi_jtag_tms_seq;
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jtag_proc.jtagtap_tdi_tdo_seq = ftdi_jtag_tdi_tdo_seq;
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jtag_proc.jtagtap_tdi_seq = ftdi_jtag_tdi_seq;
82+
jtag_proc.jtagtap_cycle = ftdi_jtag_cycle;
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jtag_proc.tap_idle_cycles = 1;
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active_state.data[0] |= active_cable.jtag.set_data_low | MPSSE_CS | MPSSE_DI | MPSSE_DO;
@@ -103,9 +105,8 @@ bool ftdi_jtag_init(void)
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ftdi_jtag_drain_potential_garbage();
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/* Ensure we're in JTAG mode */
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for (size_t i = 0; i <= 50U; ++i)
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ftdi_jtag_next(true, false); /* 50 + 1 idle cycles for SWD reset */
108-
ftdi_jtag_tms_seq(0xe73cU, 16U); /* SWD to JTAG sequence */
108+
ftdi_jtag_cycle(true, false, 51U); /* 50 + 1 idle cycles for SWD reset */
109+
ftdi_jtag_tms_seq(0xe73cU, 16U); /* SWD to JTAG sequence */
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return true;
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}
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@@ -145,3 +146,9 @@ static bool ftdi_jtag_next(const bool tms, const bool tdi)
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ftdi_buffer_read_val(ret);
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return ret & 0x80U;
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}
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static void ftdi_jtag_cycle(const bool tms, const bool tdi, const size_t clock_cycles)
151+
{
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for (size_t i = 0; i < clock_cycles; i++)
153+
ftdi_jtag_next(tms, tdi);
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}

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