@@ -33,6 +33,7 @@ static void ftdi_jtag_reset(void);
3333static void ftdi_jtag_tms_seq (uint32_t tms_states , size_t clock_cycles );
3434static void ftdi_jtag_tdi_seq (bool final_tms , const uint8_t * data_in , size_t clock_cycles );
3535static bool ftdi_jtag_next (bool tms , bool tdi );
36+ static void ftdi_jtag_cycle (bool tms , bool tdi , size_t clock_cycles );
3637
3738/*
3839 * Throughout this file you will see command buffers being built which have the following basic form:
@@ -78,6 +79,7 @@ bool ftdi_jtag_init(void)
7879 jtag_proc .jtagtap_tms_seq = ftdi_jtag_tms_seq ;
7980 jtag_proc .jtagtap_tdi_tdo_seq = ftdi_jtag_tdi_tdo_seq ;
8081 jtag_proc .jtagtap_tdi_seq = ftdi_jtag_tdi_seq ;
82+ jtag_proc .jtagtap_cycle = ftdi_jtag_cycle ;
8183 jtag_proc .tap_idle_cycles = 1 ;
8284
8385 active_state .data [0 ] |= active_cable .jtag .set_data_low | MPSSE_CS | MPSSE_DI | MPSSE_DO ;
@@ -103,9 +105,8 @@ bool ftdi_jtag_init(void)
103105 ftdi_jtag_drain_potential_garbage ();
104106
105107 /* Ensure we're in JTAG mode */
106- for (size_t i = 0 ; i <= 50U ; ++ i )
107- ftdi_jtag_next (true, false); /* 50 + 1 idle cycles for SWD reset */
108- ftdi_jtag_tms_seq (0xe73cU , 16U ); /* SWD to JTAG sequence */
108+ ftdi_jtag_cycle (true, false, 51U ); /* 50 + 1 idle cycles for SWD reset */
109+ ftdi_jtag_tms_seq (0xe73cU , 16U ); /* SWD to JTAG sequence */
109110 return true;
110111}
111112
@@ -145,3 +146,9 @@ static bool ftdi_jtag_next(const bool tms, const bool tdi)
145146 ftdi_buffer_read_val (ret );
146147 return ret & 0x80U ;
147148}
149+
150+ static void ftdi_jtag_cycle (const bool tms , const bool tdi , const size_t clock_cycles )
151+ {
152+ for (size_t i = 0 ; i < clock_cycles ; i ++ )
153+ ftdi_jtag_next (tms , tdi );
154+ }
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