Boot UEFI Windows (UEFI Support + ACPI + 8GB RAM) (#708)

# PR: Add UEFI/OVMF boot support (fw_cfg + dynamic ACPI) and robust >3GB
RAM handling

## Summary
This change set enables booting modern UEFI guests (including Windows
Server 2025) under Bochs using OVMF by adding a QEMU-compatible `fw_cfg`
device and generating the ACPI tables firmware expects. In the same
work, it hardens/clarifies >3GB RAM behavior by introducing a PCI/MMIO
“hole” at 3–4GB with RAM remapped above 4GB, and centralizes the address
translation so memory accesses remain correct and safe.

A key constraint throughout is **BIOS-safe defaults**: all UEFI/OVMF
behavior is **opt-in** and gated by the `fw_cfg: enabled=1`
configuration.

## Motivation
- The target `servercore2025.vhd` (Windows Server Core 2025, UEFI
install) boots under QEMU/Hyper-V but historically did not boot under
Bochs.
- OVMF expects:
  - QEMU-like `fw_cfg` to provide E820 and ACPI tables
  - a modern ACPI environment (RSDP/XSDT/FADT/FACS/DSDT/MADT/HPET)
- sane PCI/MMIO layout (including a reserved MMIO window and correct
memory reporting)

## User-facing changes
### New `fw_cfg` option (UEFI/OVMF support)
- New bochsrc stanza:
  - `fw_cfg: enabled=1`
- When enabled, Bochs exposes a QEMU-compatible `fw_cfg` interface at
I/O ports **0x510–0x51B** (including the DMA interface used by OVMF).
- The device provides to firmware:
  - E820 memory map (including a reserved 3–4GB PCI/MMIO hole)
  - ACPI tables (RSDP, XSDT, FADT, FACS, DSDT, MADT, HPET)
  - RAM size and CPU count

### OVMF usage
Minimal UEFI boot configuration example:
```
romimage: file=OVMF.fd, address=0
fw_cfg: enabled=1
pci: enabled=1, chipset=i440fx, slot1=pcivga
```

### Increased max host memory setting
- The configuration option for “host allocated memory size” now allows
up to **8192 MB** (previously **2048 MB**) to support larger-guest
testing.

## Core implementation details
### fw_cfg device (QEMU-compatible)
- Adds a new core plugin implementing the `fw_cfg` selector/data/DMA
protocol.
- Exposes firmware-facing blobs (E820 + ACPI tables) via the fw_cfg file
interface.

### Dynamic ACPI table generation
- Introduces runtime-generated ACPI table blobs aligned with the default
i440fx/PIIX device model.
- Uses an embedded AML blob for DSDT.

### DSDT AML generation and reproducibility
- `bochs/iodev/acpi_dsdt_aml.h` is a **generated** artifact embedding
the compiled AML for the Bochs DSDT.
- Regeneration script:
  - `bochs/tools/gen_acpi_dsdt_aml.py`
  - Requires ACPICA `iasl` (available on PATH or passed via `--iasl`).
- Temporary outputs from regeneration are ignored via `.gitignore` (e.g.
`bochs/tools/_acpi_dsdt_aml.*`).

### >3GB RAM / PCI hole handling
- Adds a well-defined PCI/MMIO hole at **3–4GB**.
- RAM that would otherwise occupy 3–4GB is remapped above 4GB.
- Introduces/uses a shared helper (`bx_translate_gpa_to_linear()`) so
physical memory operations remain correct across the remap.

### Safety: direct host-pointer access in the PCI/MMIO hole
- The PCI/MMIO hole is treated as “no direct host pointer” by default to
avoid incorrect aliasing into RAM backing store.
- A narrow exception is allowed for ROM-backed fetches in the BIOS/UEFI
ROM window (required for reset-vector fetch correctness) while keeping
MMIO safety guarantees.

### Reset semantics (BIOS-safe by default)
- `fw_cfg` is loaded only when `fw_cfg: enabled=1`.
- On **hardware reset** and only when UEFI is enabled, memory
resets/reloads ROM images because OVMF may modify ROM contents during
execution.
- Device reset behavior was audited where startup invokes `reset()` to
ensure BIOS behavior is not accidentally altered.

## Other correctness/compatibility improvements (touched by this PR)
- CPU reset correctness: clears additional state, invokes mode-change
handlers, and flushes TLB at reset.
- MSR compatibility: adds `MSR_PLATFORM_ID` and returns 0 on read.
- VGA/UEFI graphics: adds QEMU-compatible VBE BAR2 mapping used by OVMF
QemuVideoDxe.
- Several devices gained/reset-aligned initialization to keep init/reset
consistent:
- keyboard controller, serial, ATA controller state, PIC/PIT, DMA I/O
width robustness.

## Documentation updates
- User documentation updated with:
  - how to configure OVMF + `fw_cfg`
  - how the embedded DSDT AML is produced and how to regenerate it
  - note that OVMF graphics works best with `pci: ... slot1=pcivga`
- `CHANGES` updated with new features and the increased max host memory
setting.

## Testing
- BIOS smoke test: confirmed legacy BIOS boot still works with default
settings.
- UEFI smoke test: confirmed OVMF boots and provides visible output with
`fw_cfg` enabled and PCI VGA (`pcivga`).
- Target OS coverage: tested with `servercore2025.vhd` under OVMF to
exercise the UEFI boot path (fw_cfg + ACPI + PCI-hole memory map).

## Files changed (by area)
### New files
- `bochs/iodev/fw_cfg.cc`, `bochs/iodev/fw_cfg.h` (fw_cfg device)
- `bochs/iodev/acpi_tables.cc`, `bochs/iodev/acpi_tables.h` (dynamic
ACPI)
- `bochs/iodev/acpi_dsdt_aml.h` (generated AML blob)
- `bochs/tools/gen_acpi_dsdt_aml.py` (DSDT regen helper)

### Updated files
- Configuration and docs:
  - `.gitattributes`, `.gitignore`
  - `bochs/CHANGES`
  - `bochs/config.cc`
  - `bochs/doc/docbook/user/user.dbk`
- Core plumbing:
  - `bochs/plugin.h`, `bochs/plugin.cc`, `bochs/param_names.h`
  - `bochs/cpu/init.cc`, `bochs/cpu/msr.cc`, `bochs/cpu/msr.h`
- `bochs/memory/memory-bochs.h`, `bochs/memory/memory.cc`,
`bochs/memory/memory_stub.cc`, `bochs/memory/misc_mem.cc`
- Devices:
- `bochs/iodev/devices.cc`, `bochs/iodev/acpi.cc`, `bochs/iodev/hpet.cc`
  - `bochs/iodev/display/vga.cc`, `bochs/iodev/display/vga.h`
- `bochs/iodev/dma.cc`, `bochs/iodev/pic.cc`, `bochs/iodev/pit82c54.cc`
- `bochs/iodev/keyboard.cc`, `bochs/iodev/serial.cc`,
`bochs/iodev/serial.h`, `bochs/iodev/harddrv.cc`

## Notes / follow-ups
- This PR intentionally keeps UEFI support **opt-in** to avoid changing
the default BIOS behavior.
- The DSDT AML is committed as a generated artifact to avoid a
build-time dependency on ACPICA; the provided script documents how to
regenerate it deterministically.
- `.gitignore` shows a large diff primarily due to line-ending
normalization (LF) plus a small number of new ignore patterns for local
test artifacts and the DSDT regeneration temporary outputs.

## Sample UEFI BXRC:
```
# Minimal UEFI smoke config (fw_cfg enabled)
plugin_ctrl: unmapped=1, biosdev=1, speaker=0, serial=1, parallel=0, gameport=0, e1000=0, extfpuirq=1
config_interface: textconfig
display_library: win32

memory: host=4096, guest=4096

# OVMF firmware
romimage: file="e:/tmp/VSCODE_PROJ2/RELEASEX64_OVMF.fd", address=0x0, options=none
vgaromimage: file="e:/tmp/bochs_upstream/bochs/bios/VGABIOS-lgpl-latest.bin"

# UEFI boot requires fw_cfg
fw_cfg: enabled=1

boot: disk
floppy_bootsig_check: disabled=0

ata0: enabled=1, ioaddr1=0x1f0, ioaddr2=0x3f0, irq=14
ata0-master: type=disk, path="e:/tmp/VSCODE_PROJ2/servercore2025.vhd", mode=vpc

ata1: enabled=1, ioaddr1=0x170, ioaddr2=0x370, irq=15
ata1-master: type=none
ata1-slave: type=none
ata2: enabled=0
ata3: enabled=0

# UEFI GOP/video init expects VGA as a PCI device
pci: enabled=1, chipset=i440fx, slot1=pcivga
vga: extension=vbe, update_freq=60, realtime=1
cpu: count=1, ips=100000000, model=corei7_sandy_bridge_2600k, reset_on_triple_fault=0, cpuid_limit_winnt=0, ignore_bad_msrs=1, mwait_is_nop=1

print_timestamps: enabled=0
port_e9_hack: enabled=0
private_colormap: enabled=0
clock: sync=none, time0=local, rtc_sync=0

log: e:/tmp/VSCODE_PROJ2/bochsout_smoke_uefi.txt
logprefix: %t%e%d

debug: action=ignore
info: action=report
error: action=report
panic: action=report

# OVMF debug output
com1: enabled=1, mode=file, dev=e:/tmp/VSCODE_PROJ2/serial_smoke_uefi.log

keyboard: type=mf, serial_delay=250, paste_delay=100000, user_shortcut=ctrl-alt-del
mouse: type=ps2, enabled=0, toggle=ctrl+mbutton
```

Author: Kharosx0

.gitattributes

@@ -1,2 +1,7 @@
 * text=auto eol=lf
-configure binary
+configure binary
+
+# Explicitly enforce LF on frequently-edited generated/interop files.
+bochs/iodev/fw_cfg.cc text eol=lf
+bochs/iodev/fw_cfg.h  text eol=lf
+bochs/iodev/acpi_dsdt_aml.h text eol=lf

.gitignore

@@ -47,6 +47,10 @@ bochs-msvc-src.zip
 /bochs/bios/rombios*.txt
 /bochs/bios/rombios*.bin
 /bochs/bios/rombios32.out
+/bochs/bios/acpi-dsdt-preprocessed.*
+
+# ACPI DSDT generation temporary outputs (bochs/tools/gen_acpi_dsdt_aml.py)
+/bochs/tools/_acpi_dsdt_aml.*
 
 # /bochs/build/linux/
 /bochs/build/linux/DOC-linux.html

bochs/CHANGES

@@ -34,12 +34,33 @@ Detailed change log :
 - Config interface
   - On Windows make sure file name parameters use backslash as separator
   - Removed backward compatibility mode for USB device options
+  - Increased maximum host memory size to 8192 MB (was 2048 MB)
 
 - Memory
+  - PCI hole support for >3GB RAM (NEW)
+    Added guest physical address translation for systems with more than 3GB RAM.
+    RAM from 3GB-4GB is remapped above 4GB to make room for PCI MMIO space.
+    The bx_translate_gpa_to_linear() helper handles the remapping transparently.
+    Works correctly with 2GB, 4GB, 8GB, 12GB, 16GB, and larger RAM configurations.
+
   - Added support for overlapping r/o memory handlers (used for PCI ROM)
   - Added support for mapping PCI ROM to expansion ROM space
 
 - I/O Devices
+  - fw_cfg (NEW)
+    Added QEMU-compatible fw_cfg device for UEFI/OVMF firmware support.
+    Provides system configuration to firmware via I/O ports 0x510-0x51B:
+    - E820 memory map with PCI hole (3GB-4GB reserved for MMIO)
+    - ACPI tables (RSDP, XSDT, FADT, FACS, DSDT, MADT, HPET)
+    - RAM size and CPU count information
+    - DMA protocol for table loading
+    This enables booting UEFI operating systems including Windows Server 2025
+    and modern Linux distributions with OVMF firmware.
+  - ACPI Tables
+    Added dynamic ACPI table generation for UEFI firmware compatibility.
+    Tables are compatible with PIIX4 PM/ACPI and include proper DSDT.
+    The generated DSDT is aligned with the default PCI/PIIX device model.
+
   - GeForce (NEW)
     Added basic support for three GeForce models. Most of the 2D features are present,
     but 3D is still WIP. Several Windows versions up to Win 7 have been reported to
@@ -3133,7 +3154,7 @@ Detailed change log :
  [1021758] GNU/k*BSD host support by Robert Millan
   [969967] int 15/ah=87h clearing cr0 by Ben Lunt
  [1048327] Russian Keymap by Dmitry Soshnikov
-  [851332] DESTDIR support for install_dlx by Ville Skytt�
+  [851332] DESTDIR support for install_dlx by Ville Skytt�
   [970929] gdbstub support for MinGW tool chains by Muranaka Masaki
  [1021740] Turn gdb stub into a runtime option by Charles Duffy
  [1063329] RFB key press/release bug fix by Remko van der Vossen

bochs/build/win32/vs2019-workspace/vs2019-plugins/iodev.vcxproj

@@ -215,11 +215,16 @@
     </Bscmake>
   </ItemDefinitionGroup>
   <ItemGroup>
+    <ClCompile Include="..\iodev\acpi_tables.cc" />
     <ClCompile Include="..\iodev\devices.cc" />
+    <ClCompile Include="..\iodev\fw_cfg.cc" />
     <ClCompile Include="..\iodev\slowdown_timer.cc" />
     <ClCompile Include="..\iodev\virt_timer.cc" />
   </ItemGroup>
   <ItemGroup>
+    <ClInclude Include="..\iodev\acpi_dsdt_aml.h" />
+    <ClInclude Include="..\iodev\acpi_tables.h" />
+    <ClInclude Include="..\iodev\fw_cfg.h" />
     <ClInclude Include="..\iodev\iodev.h" />
     <ClInclude Include="..\iodev\slowdown_timer.h" />
     <ClInclude Include="..\iodev\virt_timer.h" />

bochs/build/win32/vs2019-workspace/vs2019/iodev.vcxproj

@@ -216,13 +216,15 @@
   </ItemDefinitionGroup>
   <ItemGroup>
     <ClCompile Include="..\iodev\acpi.cc" />
+    <ClCompile Include="..\iodev\acpi_tables.cc" />
     <ClCompile Include="..\iodev\biosdev.cc" />
     <ClCompile Include="..\iodev\busmouse.cc" />
     <ClCompile Include="..\iodev\cmos.cc" />
     <ClCompile Include="..\iodev\devices.cc" />
     <ClCompile Include="..\iodev\dma.cc" />
     <ClCompile Include="..\iodev\extfpuirq.cc" />
     <ClCompile Include="..\iodev\floppy.cc" />
+    <ClCompile Include="..\iodev\fw_cfg.cc" />
     <ClCompile Include="..\iodev\gameport.cc" />
     <ClCompile Include="..\iodev\harddrv.cc" />
     <ClCompile Include="..\iodev\hpet.cc" />
@@ -246,12 +248,15 @@
   </ItemGroup>
   <ItemGroup>
     <ClInclude Include="..\iodev\acpi.h" />
+    <ClInclude Include="..\iodev\acpi_dsdt_aml.h" />
+    <ClInclude Include="..\iodev\acpi_tables.h" />
     <ClInclude Include="..\iodev\biosdev.h" />
     <ClInclude Include="..\iodev\busmouse.h" />
     <ClInclude Include="..\iodev\cmos.h" />
     <ClInclude Include="..\iodev\dma.h" />
     <ClInclude Include="..\iodev\extfpuirq.h" />
     <ClInclude Include="..\iodev\floppy.h" />
+    <ClInclude Include="..\iodev\fw_cfg.h" />
     <ClInclude Include="..\iodev\gameport.h" />
     <ClInclude Include="..\iodev\harddrv.h" />
     <ClInclude Include="..\iodev\hpet.h" />

bochs/config.cc

@@ -726,7 +726,7 @@ void bx_init_options()
       "host",
       "Host allocated memory size (megabytes)",
       "Amount of host allocated memory in megabytes",
-      1, 2048,
+      1, 8192,
       BX_DEFAULT_MEM_MEGS);
   host_ramsize->set_ask_format("Enter host memory size (MB): [%d] ");
   ram->set_options(ram->SERIES_ASK);
@@ -1627,6 +1627,14 @@ void bx_init_options()
       "Debug messages written to i/o port 0xE9 from ring3 will be displayed on console",
       0);
 
+    // fw_cfg device (UEFI/OVMF support)
+    bx_list_c *fw_cfg = new bx_list_c(misc, "fw_cfg", "QEMU fw_cfg device (UEFI/OVMF support)");
+    new bx_param_bool_c(fw_cfg,
+      "enabled",
+      "Enable fw_cfg device",
+      "Enables the QEMU-compatible fw_cfg device used by UEFI/OVMF firmware",
+      0);
+
 #if BX_SUPPORT_IODEBUG
 // iodebug all rings
   new bx_param_bool_c(misc,
@@ -3188,6 +3196,12 @@ static int parse_line_formatted(const char *context, int num_params, char *param
         PARSE_ERR(("%s: port_e9_hack directive malformed.", context));
       }
     }
+  } else if (!strcmp(params[0], "fw_cfg")) {
+    for (i=1; i<num_params; i++) {
+      if (bx_parse_param_from_list(context, params[i], (bx_list_c*) SIM->get_param(BXPN_FW_CFG_ROOT)) < 0) {
+        PARSE_ERR(("%s: fw_cfg directive malformed.", context));
+      }
+    }
   } else if (!strcmp(params[0], "iodebug")) {
 #if BX_SUPPORT_IODEBUG
     if (num_params != 2) {
@@ -3583,6 +3597,7 @@ int bx_write_configuration(const char *rc, int overwrite)
   fprintf(fp, "print_timestamps: enabled=%d\n", bx_dbg.print_timestamps);
   bx_write_debugger_options(fp);
   bx_write_param_list(fp, (bx_list_c*) SIM->get_param(BXPN_PORT_E9_HACK_ROOT), NULL, 0);
+  bx_write_param_list(fp, (bx_list_c*) SIM->get_param(BXPN_FW_CFG_ROOT), NULL, 0);
 #if BX_SUPPORT_IODEBUG
   fprintf(fp, "iodebug: all_rings=%d\n", SIM->get_param_bool(BXPN_IODEBUG_ALL_RINGS)->get());
 #endif

bochs/doc/docbook/user/user.dbk

@@ -3180,7 +3180,29 @@ Bochs must be set up to use system and VGA BIOS like this:
 We recommend to use the ROM images distributed with Bochs or one of the latest
 <ulink url="http://www.seabios.org/">SeaBIOS</ulink> images. BIOS images designed
 for real hardware mostly do not work properly. Please see the <xref linkend="bochsopt-romimage">
-for more information.
+</para>
+
+<para>
+<emphasis>UEFI Firmware Support:</emphasis> Bochs supports UEFI boot using OVMF
+(Open Virtual Machine Firmware) from the TianoCore EDK2 project. To use UEFI:
+<screen>
+  romimage: file=OVMF.fd, address=0xffc00000
+</screen>
+UEFI boot requires the fw_cfg device which provides system configuration to the
+firmware via I/O ports 0x510-0x51B. This includes the E820 memory map, ACPI tables,
+RAM size, and CPU count. Enable it with:
+<screen>
+  fw_cfg: enabled=1
+</screen>
+For best results with OVMF graphics output, configure VGA as a PCI device:
+<screen>
+  pci: enabled=1, chipset=i440fx, slot1=pcivga
+</screen>
+The ACPI DSDT AML is built into Bochs and generated from the Bochs DSDT DSL
+source using the ACPICA iasl compiler.
+For developers, bochs/tools/gen_acpi_dsdt_aml.py can regenerate the embedded
+AML header.
+UEFI boot has been tested with Windows Server 2025 and modern Linux distributions.
 </para>
 
 <para>

bochs/iodev/Makefile.in

@@ -72,6 +72,8 @@ OBJS_THAT_CANNOT_BE_PLUGINS = \
 OBJS_THAT_CAN_BE_PLUGINS = \
   pic.o \
   pit.o \
+  fw_cfg.o \
+  acpi_tables.o \
   serial.o \
   parallel.o \
   floppy.o \

bochs/iodev/acpi.cc

@@ -162,10 +162,31 @@ void bx_acpi_ctrl_c::reset(unsigned type)
   BX_ACPI_THIS pci_conf[0x3c] = 0x00; // IRQ
 
   // PM base 0x40 - 0x43
-  BX_ACPI_THIS pci_conf[0x40] = 0x01;
-  BX_ACPI_THIS pci_conf[0x41] = 0x00;
-  BX_ACPI_THIS pci_conf[0x42] = 0x00;
-  BX_ACPI_THIS pci_conf[0x43] = 0x00;
+  // Note: the reset default (0x0001) indicates an unconfigured PCI I/O BAR.
+  // Do not map the ACPI I/O window at address 0x0000/0x0001.
+  //
+  // When running with UEFI firmware (OVMF), seed QEMU-like defaults so the
+  // ACPI PM timer is available very early.
+  const bool uefi_enabled = SIM->get_param_bool(BXPN_FW_CFG_ENABLED)->get();
+  Bit32u pmbar = ReadHostDWordFromLittleEndian((Bit32u*) &BX_ACPI_THIS pci_conf[0x40]);
+  if (!uefi_enabled) {
+    // Upstream-compatible reset behavior.
+    BX_ACPI_THIS pci_conf[0x40] = 0x01;
+    BX_ACPI_THIS pci_conf[0x41] = 0x00;
+    BX_ACPI_THIS pci_conf[0x42] = 0x00;
+    BX_ACPI_THIS pci_conf[0x43] = 0x00;
+  } else {
+    if ((pmbar & 0xffc0) == 0) {
+      // Default to 0xB000 (I/O BAR => bit0 set).
+      BX_ACPI_THIS pci_conf[0x40] = 0x01;
+      BX_ACPI_THIS pci_conf[0x41] = 0xB0;
+      BX_ACPI_THIS pci_conf[0x42] = 0x00;
+      BX_ACPI_THIS pci_conf[0x43] = 0x00;
+    } else {
+      // Preserve base, keep only the read-only bit semantics on the low byte.
+      BX_ACPI_THIS pci_conf[0x40] = (BX_ACPI_THIS pci_conf[0x40] & 0xc0) | 0x01;
+    }
+  }
 
   // clear DEVACTB register on PIIX4 ACPI reset
   BX_ACPI_THIS pci_conf[0x58] = 0x00;
@@ -179,10 +200,25 @@ void bx_acpi_ctrl_c::reset(unsigned type)
   BX_ACPI_THIS pci_conf[0x67] = 0x98;
 
   // SM base 0x90 - 0x93
-  BX_ACPI_THIS pci_conf[0x90] = 0x01;
-  BX_ACPI_THIS pci_conf[0x91] = 0x00;
-  BX_ACPI_THIS pci_conf[0x92] = 0x00;
-  BX_ACPI_THIS pci_conf[0x93] = 0x00;
+  Bit32u smbar = ReadHostDWordFromLittleEndian((Bit32u*) &BX_ACPI_THIS pci_conf[0x90]);
+  if (!uefi_enabled) {
+    // Upstream-compatible reset behavior.
+    BX_ACPI_THIS pci_conf[0x90] = 0x01;
+    BX_ACPI_THIS pci_conf[0x91] = 0x00;
+    BX_ACPI_THIS pci_conf[0x92] = 0x00;
+    BX_ACPI_THIS pci_conf[0x93] = 0x00;
+  } else {
+    if ((smbar & 0xfff0) == 0) {
+      // Default to 0xB100 (I/O BAR => bit0 set).
+      BX_ACPI_THIS pci_conf[0x90] = 0x01;
+      BX_ACPI_THIS pci_conf[0x91] = 0xB1;
+      BX_ACPI_THIS pci_conf[0x92] = 0x00;
+      BX_ACPI_THIS pci_conf[0x93] = 0x00;
+    } else {
+      // Preserve base, keep only the read-only bit semantics on the low byte.
+      BX_ACPI_THIS pci_conf[0x90] = (BX_ACPI_THIS pci_conf[0x90] & 0xf0) | 0x01;
+    }
+  }
 
   BX_ACPI_THIS s.pmsts = 0;
   BX_ACPI_THIS s.pmen = 0;
@@ -203,6 +239,22 @@ void bx_acpi_ctrl_c::reset(unsigned type)
   for (i = 0; i < 32; i++) {
     BX_ACPI_THIS s.smbus.data[i] = 0;
   }
+
+  // Map the ACPI I/O windows only when the BAR is configured (non-zero base).
+  pmbar = ReadHostDWordFromLittleEndian((Bit32u*) &BX_ACPI_THIS pci_conf[0x40]);
+  smbar = ReadHostDWordFromLittleEndian((Bit32u*) &BX_ACPI_THIS pci_conf[0x90]);
+  if ((pmbar & 0xffc0) != 0) {
+    DEV_pci_set_base_io(BX_ACPI_THIS_PTR, read_handler, write_handler,
+                        &BX_ACPI_THIS s.pm_base,
+                        &BX_ACPI_THIS pci_conf[0x40],
+                        64, &acpi_pm_iomask[0], "ACPI PM base");
+  }
+  if ((smbar & 0xfff0) != 0) {
+    DEV_pci_set_base_io(BX_ACPI_THIS_PTR, read_handler, write_handler,
+                        &BX_ACPI_THIS s.sm_base,
+                        &BX_ACPI_THIS pci_conf[0x90],
+                        16, &acpi_sm_iomask[0], "ACPI SM base");
+  }
 }
 
 void bx_acpi_ctrl_c::register_state(void)