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[X86] Enable APX and AVX10.2 on NVL (llvm#168061)
Per Intel Architecture Instruction Set Extensions Programming Reference rev. 60 (https://cdrdv2.intel.com/v1/dl/getContent/671368), table 1-2, NVL supports APX and AVX10.2
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‎clang/test/Preprocessor/predefined-arch-macros.c‎

Lines changed: 58 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -2525,15 +2525,32 @@
25252525
// RUN: %clang -march=wildcatlake -m32 -E -dM %s -o - 2>&1 \
25262526
// RUN: -target i386-unknown-linux \
25272527
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_ARL_M32,CHECK_ARLS_M32,CHECK_NKL_M32
2528-
// RUN: %clang -march=novalake -m32 -E -dM %s -o - 2>&1 \
2529-
// RUN: -target i386-unknown-linux \
2530-
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_ARL_M32,CHECK_ARLS_M32,CHECK_NVL_M32,CHECK_NKL_M32
25312528
// RUN: %clang -march=clearwaterforest -m32 -E -dM %s -o - 2>&1 \
25322529
// RUN: -target i386-unknown-linux \
2533-
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_SRF_M32,CHECK_ARLS_M32,CHECK_NVL_M32,CHECK_UMSR_M32,CHECK_NKL_M32
2530+
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_SRF_M32,CHECK_ARLS_M32,CHECK_UMSR_M32,CHECK_CWF_M32,CHECK_NKL_M32
2531+
// RUN: %clang -march=novalake -m32 -E -dM %s -o - 2>&1 \
2532+
// RUN: -target i386-unknown-linux \
2533+
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_ARL_M32,CHECK_ARLS_M32,CHECK_CWF_M32,CHECK_NVL_M32,CHECK_NKL_M32
25342534
// CHECK_ARL_M32: #define __ADX__ 1
25352535
// CHECK_ARL_M32: #define __AES__ 1
2536+
// CHECK_NVL_M32: #define __AVX10_1__ 1
2537+
// CHECK_NVL_M32: #define __AVX10_2__ 1
25362538
// CHECK_ARL_M32: #define __AVX2__ 1
2539+
// CHECK_NVL_M32: #define __AVX512BF16__ 1
2540+
// CHECK_NVL_M32: #define __AVX512BITALG__ 1
2541+
// CHECK_NVL_M32: #define __AVX512BW__ 1
2542+
// CHECK_NVL_M32: #define __AVX512CD__ 1
2543+
// CHECK_NVL_M32: #define __AVX512DQ__ 1
2544+
// CHECK_NVL_M32: #define __AVX512FP16__ 1
2545+
// CHECK_NVL_M32: #define __AVX512F__ 1
2546+
// CHECK_NVL_M32: #define __AVX512IFMA__ 1
2547+
// CHECK_NVL_M32: #define __AVX512VBMI2__ 1
2548+
// CHECK_NVL_M32: #define __AVX512VBMI__ 1
2549+
// CHECK_NVL_M32: #define __AVX512VL__ 1
2550+
// CHECK_NVL_M32: #define __AVX512VNNI__ 1
2551+
// CHECK_NVL_M32: #define __AVX512VPOPCNTDQ__ 1
2552+
// We check for NOT AVX512 after all checks for AVX512, so
2553+
// if we missed some check on NVL, the test will fail.
25372554
// CHECK_ARL_M32-NOT: AVX512
25382555
// CHECK_ARL_M32: #define __AVXIFMA__ 1
25392556
// CHECK_ARL_M32: #define __AVXNECONVERT__ 1
@@ -2544,11 +2561,13 @@
25442561
// CHECK_ARL_M32: #define __AVX__ 1
25452562
// CHECK_ARL_M32: #define __BMI2__ 1
25462563
// CHECK_ARL_M32: #define __BMI__ 1
2564+
// CHECK_NVL_M32: #define __CCMP__ 1
25472565
// CHECK_ARLS_M32-NOT: __CLDEMOTE__
25482566
// CHECK_SRF_M32: #define __CLDEMOTE__ 1
25492567
// CHECK_ARL_M32: #define __CLFLUSHOPT__ 1
25502568
// CHECK_ARL_M32: #define __CLWB__ 1
25512569
// CHECK_ARL_M32: #define __CMPCCXADD__ 1
2570+
// CHECK_NVL_M32: #define __EGPR__ 1
25522571
// CHECK_ARL_M32: #define __ENQCMD__ 1
25532572
// CHECK_ARL_M32: #define __F16C__ 1
25542573
// CHECK_ARL_M32: #define __FMA__ 1
@@ -2564,15 +2583,20 @@
25642583
// CHECK_ARL_M32: #define __MOVBE__ 1
25652584
// CHECK_ARL_M32: #define __MOVDIR64B__ 1
25662585
// CHECK_ARL_M32: #define __MOVDIRI__ 1
2586+
// CHECK_NVL_M32: #define __MOVRS__ 1
2587+
// CHECK_NVL_M32: #define __NDD__ 1
2588+
// CHECK_NVL_M32: #define __NF__ 1
25672589
// CHECK_ARL_M32: #define __PCLMUL__ 1
25682590
// CHECK_ARL_M32: #define __PCONFIG__ 1
25692591
// CHECK_ARL_M32: #define __PKU__ 1
25702592
// CHECK_ARL_M32: #define __POPCNT__ 1
2593+
// CHECK_NVL_M32: #define __PPX__ 1
25712594
// CHECK_ARL_M32-NOT: #define __PREFETCHI__ 1
25722595
// CHECK_ARLS_M32-NOT: #define __PREFETCHI__ 1
2573-
// CHECK_NVL_M32: #define __PREFETCHI__ 1
2596+
// CHECK_CWF_M32: #define __PREFETCHI__ 1
25742597
// CHECK_ARL_M32: #define __PRFCHW__ 1
25752598
// CHECK_ARL_M32: #define __PTWRITE__ 1
2599+
// CHECK_NVL_M32: #define __PUSH2POP2__ 1
25762600
// CHECK_ARL_M32-NOT: #define __RAOINT__ 1
25772601
// CHECK_ARL_M32: #define __RDPID__ 1
25782602
// CHECK_ARL_M32: #define __RDRND__ 1
@@ -2607,6 +2631,7 @@
26072631
// CHECK_ARL_M32: #define __XSAVEOPT__ 1
26082632
// CHECK_ARL_M32: #define __XSAVES__ 1
26092633
// CHECK_ARL_M32: #define __XSAVE__ 1
2634+
// CHECK_NVL_M32: #define __ZU__ 1
26102635
// CHECK_ARL_M32: #define __corei7 1
26112636
// CHECK_ARL_M32: #define __corei7__ 1
26122637
// CHECK_ARL_M32: #define __i386 1
@@ -2635,15 +2660,30 @@
26352660
// RUN: %clang -march=wildcatlake -m64 -E -dM %s -o - 2>&1 \
26362661
// RUN: -target i386-unknown-linux \
26372662
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_ARL_M64,CHECK_ARLS_M64,CHECK_NKL_M64
2638-
// RUN: %clang -march=novalake -m64 -E -dM %s -o - 2>&1 \
2639-
// RUN: -target i386-unknown-linux \
2640-
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_ARL_M64,CHECK_ARLS_M64,CHECK_NVL_M64,CHECK_NKL_M64
26412663
// RUN: %clang -march=clearwaterforest -m64 -E -dM %s -o - 2>&1 \
26422664
// RUN: -target i386-unknown-linux \
2643-
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_ARL_M64,CHECK_SRF_M64,CHECK_ARLS_M64,CHECK_NVL_M64,CHECK_UMSR_M64,CHECK_NKL_M64
2665+
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_SRF_M64,CHECK_ARLS_M64,CHECK_UMSR_M64,CHECK_CWF_M64,CHECK_NKL_M64
2666+
// RUN: %clang -march=novalake -m64 -E -dM %s -o - 2>&1 \
2667+
// RUN: -target i386-unknown-linux \
2668+
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_ARL_M64,CHECK_ARLS_M64,CHECK_CWF_M64,CHECK_NVL_M64,CHECK_NKL_M64
26442669
// CHECK_ARL_M64: #define __ADX__ 1
26452670
// CHECK_ARL_M64: #define __AES__ 1
2671+
// CHECK_NVL_M64: #define __AVX10_1__ 1
2672+
// CHECK_NVL_M64: #define __AVX10_2__ 1
26462673
// CHECK_ARL_M64: #define __AVX2__ 1
2674+
// CHECK_NVL_M64: #define __AVX512BF16__ 1
2675+
// CHECK_NVL_M64: #define __AVX512BITALG__ 1
2676+
// CHECK_NVL_M64: #define __AVX512BW__ 1
2677+
// CHECK_NVL_M64: #define __AVX512CD__ 1
2678+
// CHECK_NVL_M64: #define __AVX512DQ__ 1
2679+
// CHECK_NVL_M64: #define __AVX512FP16__ 1
2680+
// CHECK_NVL_M64: #define __AVX512F__ 1
2681+
// CHECK_NVL_M64: #define __AVX512IFMA__ 1
2682+
// CHECK_NVL_M64: #define __AVX512VBMI2__ 1
2683+
// CHECK_NVL_M64: #define __AVX512VBMI__ 1
2684+
// CHECK_NVL_M64: #define __AVX512VL__ 1
2685+
// CHECK_NVL_M64: #define __AVX512VNNI__ 1
2686+
// CHECK_NVL_M64: #define __AVX512VPOPCNTDQ__ 1
26472687
// CHECK_ARL_M64-NOT: AVX512
26482688
// CHECK_ARL_M64: #define __AVXIFMA__ 1
26492689
// CHECK_ARL_M64: #define __AVXNECONVERT__ 1
@@ -2654,11 +2694,13 @@
26542694
// CHECK_ARL_M64: #define __AVX__ 1
26552695
// CHECK_ARL_M64: #define __BMI2__ 1
26562696
// CHECK_ARL_M64: #define __BMI__ 1
2697+
// CHECK_NVL_M64: #define __CCMP__ 1
26572698
// CHECK_ARLS_M64-NOT: __CLDEMOTE__
26582699
// CHECK_SRF_M64: #define __CLDEMOTE__ 1
26592700
// CHECK_ARL_M64: #define __CLFLUSHOPT__ 1
26602701
// CHECK_ARL_M64: #define __CLWB__ 1
26612702
// CHECK_ARL_M64: #define __CMPCCXADD__ 1
2703+
// CHECK_NVL_M64: #define __EGPR__ 1
26622704
// CHECK_ARL_M64: #define __ENQCMD__ 1
26632705
// CHECK_ARL_M64: #define __F16C__ 1
26642706
// CHECK_ARL_M64: #define __FMA__ 1
@@ -2674,15 +2716,20 @@
26742716
// CHECK_ARL_M64: #define __MOVBE__ 1
26752717
// CHECK_ARL_M64: #define __MOVDIR64B__ 1
26762718
// CHECK_ARL_M64: #define __MOVDIRI__ 1
2719+
// CHECK_NVL_M64: #define __MOVRS__ 1
2720+
// CHECK_NVL_M64: #define __NDD__ 1
2721+
// CHECK_NVL_M64: #define __NF__ 1
26772722
// CHECK_ARL_M64: #define __PCLMUL__ 1
26782723
// CHECK_ARL_M64: #define __PCONFIG__ 1
26792724
// CHECK_ARL_M64: #define __PKU__ 1
26802725
// CHECK_ARL_M64: #define __POPCNT__ 1
2726+
// CHECK_NVL_M64: #define __PPX__ 1
26812727
// CHECK_ARL_M64-NOT: #define __PREFETCHI__ 1
26822728
// CHECK_ARLS_M64-NOT: #define __PREFETCHI__ 1
2683-
// CHECK_NVL_M64: #define __PREFETCHI__ 1
2729+
// CHECK_CWF_M64: #define __PREFETCHI__ 1
26842730
// CHECK_ARL_M64: #define __PRFCHW__ 1
26852731
// CHECK_ARL_M64: #define __PTWRITE__ 1
2732+
// CHECK_NVL_M64: #define __PUSH2POP2__ 1
26862733
// CHECK_ARL_M64-NOT: #define __RAOINT__ 1
26872734
// CHECK_ARL_M64: #define __RDPID__ 1
26882735
// CHECK_ARL_M64: #define __RDRND__ 1
@@ -2718,6 +2765,7 @@
27182765
// CHECK_ARL_M64: #define __XSAVEOPT__ 1
27192766
// CHECK_ARL_M64: #define __XSAVES__ 1
27202767
// CHECK_ARL_M64: #define __XSAVE__ 1
2768+
// CHECK_NVL_M64: #define __ZU__ 1
27212769
// CHECK_ARL_M64: #define __amd64 1
27222770
// CHECK_ARL_M64: #define __amd64__ 1
27232771
// CHECK_ARL_M64: #define __corei7 1

‎llvm/lib/Target/X86/X86.td‎

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1334,8 +1334,18 @@ def ProcessorFeatures {
13341334
!listremove(ARLSFeatures, [FeatureWIDEKL]);
13351335

13361336
// Novalake
1337+
list<SubtargetFeature> NVLAdditionalFeatures = [FeatureAVX10_2,
1338+
FeatureMOVRS,
1339+
FeatureEGPR,
1340+
FeaturePush2Pop2,
1341+
FeaturePPX,
1342+
FeatureNF,
1343+
FeatureNDD,
1344+
FeatureZU,
1345+
FeatureCCMP,
1346+
FeaturePREFETCHI];
13371347
list<SubtargetFeature> NVLFeatures =
1338-
!listconcat(PTLFeatures, [FeaturePREFETCHI]);
1348+
!listconcat(PTLFeatures, NVLAdditionalFeatures);
13391349

13401350
// Clearwaterforest
13411351
list<SubtargetFeature> CWFAdditionalFeatures = [FeaturePREFETCHI,

‎llvm/lib/TargetParser/X86TargetParser.cpp‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -176,7 +176,9 @@ constexpr FeatureBitset FeaturesArrowlakeS =
176176
constexpr FeatureBitset FeaturesPantherlake =
177177
(FeaturesArrowlakeS ^ FeatureWIDEKL);
178178
constexpr FeatureBitset FeaturesNovalake =
179-
FeaturesPantherlake | FeaturePREFETCHI;
179+
FeaturesPantherlake | FeaturePREFETCHI | FeatureAVX10_2 | FeatureMOVRS |
180+
FeatureEGPR | FeatureZU | FeatureCCMP | FeaturePush2Pop2 | FeaturePPX |
181+
FeatureNDD | FeatureNF;
180182
constexpr FeatureBitset FeaturesClearwaterforest =
181183
(FeaturesSierraforest ^ FeatureWIDEKL) | FeatureAVXVNNIINT16 |
182184
FeatureSHA512 | FeatureSM3 | FeatureSM4 | FeaturePREFETCHI | FeatureUSERMSR;

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