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[AArch64][llvm] Fix disassembly of ldt{add,set,clr} instructions using xzr/wzr (llvm#152292)
The current disassembly of `ldt{add,set,clr}` instructions when using `xzr/wzr` is incorrect. The Armv9.6-A Memory Systems specification says: ``` For each of LDT{ADD|SET|CLR}{L}, there is the corresponding STT{ADD|SET|CLR}{L} alias, for the case where the register selected by the Rt field is XZR or WZR ``` and: ``` LDT{ADD|SET|CLR}{A}{L} is equivalent to LD{ADD|SET|CLR}{A}{L} except that: <..conditions..> ``` The Arm ARM specifies the preferred form of disassembly for these aliases: ``` STADD <Xs>, [<Xn|SP>] is equivalent to LDADD <Xs>, XZR, [<Xn|SP>] and is always the preferred disassembly. ``` (ref: DDI 0487L.b C6-2317) This means that `sttadd` is the preferred disassembly for `ldtadd w0, wzr, [x2]` when Rt is `xzr` or `wzr`. This change also aligns llvm disassembly with GNU binutils, as shown by the following examples: llvm before this change: ``` % cat test.s stadd w0, [sp] sttadd w0, [sp] ldadd w0, wzr, [sp] ldtadd w0, wzr, [sp] % llvm-mc-20 -triple aarch64 -mattr=+lse,+lsui test.s stadd w0, [sp] ldtadd w0, wzr, [sp] stadd w0, [sp] ldtadd w0, wzr, [sp] ``` llvm after this change: ``` % llvm-mc -triple aarch64 -mattr=+lse,+lsui test.s stadd w0, [sp] sttadd w0, [sp] stadd w0, [sp] sttadd w0, [sp] ``` GCC-15 test: ``` % gas test.s -march=armv8-a+lsui+lse -o test.o % objdump -dr test.o 0: b82003ff stadd w0, [sp] 4: 192007ff sttadd w0, [sp] 8: b82003ff stadd w0, [sp] c: 192007ff sttadd w0, [sp] ``` Many thanks to Ezra Sitorus and Alice Carlotti for reporting and confirming this issue.
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‎llvm/lib/Target/AArch64/AArch64InstrFormats.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12564,7 +12564,7 @@ multiclass STOPregister<string asm, string instr> {
1256412564
let Predicates = [HasLSUI] in
1256512565
class BaseSTOPregisterLSUI<string asm, RegisterClass OP, Register Reg,
1256612566
Instruction inst> :
12567-
InstAlias<asm # "\t$Rs, [$Rn]", (inst Reg, OP:$Rs, GPR64sp:$Rn), 0>;
12567+
InstAlias<asm # "\t$Rs, [$Rn]", (inst Reg, OP:$Rs, GPR64sp:$Rn)>;
1256812568

1256912569
multiclass STOPregisterLSUI<string asm, string instr> {
1257012570
def : BaseSTOPregisterLSUI<asm # "l", GPR32, WZR,

‎llvm/test/MC/AArch64/armv9.6a-lsui.s‎

Lines changed: 36 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -212,10 +212,10 @@ _func:
212212
//------------------------------------------------------------------------------
213213

214214
ldtadd w7, wzr, [x5]
215-
// CHECK: ldtadd w7, wzr, [x5] // encoding: [0xbf,0x04,0x27,0x19]
215+
// CHECK: sttadd w7, [x5] // encoding: [0xbf,0x04,0x27,0x19]
216216
// ERROR: instruction requires: lsui
217217
ldtadd x9, xzr, [sp]
218-
// CHECK: ldtadd x9, xzr, [sp] // encoding: [0xff,0x07,0x29,0x59]
218+
// CHECK: sttadd x9, [sp] // encoding: [0xff,0x07,0x29,0x59]
219219
// ERROR: instruction requires: lsui
220220

221221
ldtadda w7, wzr, [x5]
@@ -226,10 +226,10 @@ _func:
226226
// ERROR: instruction requires: lsui
227227

228228
ldtaddl w7, wzr, [x5]
229-
// CHECK: ldtaddl w7, wzr, [x5] // encoding: [0xbf,0x04,0x67,0x19]
229+
// CHECK: sttaddl w7, [x5] // encoding: [0xbf,0x04,0x67,0x19]
230230
// ERROR: instruction requires: lsui
231231
ldtaddl x9, xzr, [sp]
232-
// CHECK: ldtaddl x9, xzr, [sp] // encoding: [0xff,0x07,0x69,0x59]
232+
// CHECK: sttaddl x9, [sp] // encoding: [0xff,0x07,0x69,0x59]
233233
// ERROR: instruction requires: lsui
234234

235235
ldtaddal w7, wzr, [x5]
@@ -240,17 +240,17 @@ _func:
240240
// ERROR: instruction requires: lsui
241241

242242
ldtclr w7, wzr, [x5]
243-
// CHECK: ldtclr w7, wzr, [x5] // encoding: [0xbf,0x14,0x27,0x19]
243+
// CHECK: sttclr w7, [x5] // encoding: [0xbf,0x14,0x27,0x19]
244244
// ERROR: instruction requires: lsui
245245
ldtclr x9, xzr, [sp]
246-
// CHECK: ldtclr x9, xzr, [sp] // encoding: [0xff,0x17,0x29,0x59]
246+
// CHECK: sttclr x9, [sp] // encoding: [0xff,0x17,0x29,0x59]
247247
// ERROR: instruction requires: lsui
248248

249249
ldtclrl w7, wzr, [x5]
250-
// CHECK: ldtclrl w7, wzr, [x5] // encoding: [0xbf,0x14,0x67,0x19]
250+
// CHECK: sttclrl w7, [x5] // encoding: [0xbf,0x14,0x67,0x19]
251251
// ERROR: instruction requires: lsui
252252
ldtclrl x9, xzr, [sp]
253-
// CHECK: ldtclrl x9, xzr, [sp] // encoding: [0xff,0x17,0x69,0x59]
253+
// CHECK: sttclrl x9, [sp] // encoding: [0xff,0x17,0x69,0x59]
254254
// ERROR: instruction requires: lsui
255255

256256
ldtclra w7, wzr, [x5]
@@ -268,17 +268,17 @@ _func:
268268
// ERROR: instruction requires: lsui
269269

270270
ldtset w7, wzr, [x5]
271-
// CHECK: ldtset w7, wzr, [x5] // encoding: [0xbf,0x34,0x27,0x19]
271+
// CHECK: sttset w7, [x5] // encoding: [0xbf,0x34,0x27,0x19]
272272
// ERROR: instruction requires: lsui
273273
ldtset x9, xzr, [sp]
274-
// CHECK: ldtset x9, xzr, [sp] // encoding: [0xff,0x37,0x29,0x59]
274+
// CHECK: sttset x9, [sp] // encoding: [0xff,0x37,0x29,0x59]
275275
// ERROR: instruction requires: lsui
276276

277277
ldtsetl w7, wzr, [x5]
278-
// CHECK: ldtsetl w7, wzr, [x5] // encoding: [0xbf,0x34,0x67,0x19]
278+
// CHECK: sttsetl w7, [x5] // encoding: [0xbf,0x34,0x67,0x19]
279279
// ERROR: instruction requires: lsui
280280
ldtsetl x9, xzr, [sp]
281-
// CHECK: ldtsetl x9, xzr, [sp] // encoding: [0xff,0x37,0x69,0x59]
281+
// CHECK: sttsetl x9, [sp] // encoding: [0xff,0x37,0x69,0x59]
282282
// ERROR: instruction requires: lsui
283283

284284
ldtseta w7, wzr, [x5]
@@ -300,81 +300,81 @@ _func:
300300
//------------------------------------------------------------------------------
301301

302302
sttadd w0, [x2]
303-
// CHECK: ldtadd w0, wzr, [x2] // encoding: [0x5f,0x04,0x20,0x19]
303+
// CHECK: sttadd w0, [x2] // encoding: [0x5f,0x04,0x20,0x19]
304304
// ERROR: instruction requires: lsui
305305
sttadd w2, [sp]
306-
// CHECK: ldtadd w2, wzr, [sp] // encoding: [0xff,0x07,0x22,0x19]
306+
// CHECK: sttadd w2, [sp] // encoding: [0xff,0x07,0x22,0x19]
307307
// ERROR: instruction requires: lsui
308308
sttadd x0, [x2]
309-
// CHECK: ldtadd x0, xzr, [x2] // encoding: [0x5f,0x04,0x20,0x59]
309+
// CHECK: sttadd x0, [x2] // encoding: [0x5f,0x04,0x20,0x59]
310310
// ERROR: instruction requires: lsui
311311
sttadd x2, [sp]
312-
// CHECK: ldtadd x2, xzr, [sp] // encoding: [0xff,0x07,0x22,0x59]
312+
// CHECK: sttadd x2, [sp] // encoding: [0xff,0x07,0x22,0x59]
313313
// ERROR: instruction requires: lsui
314314

315315
sttaddl w0, [x2]
316-
// CHECK: ldtaddl w0, wzr, [x2] // encoding: [0x5f,0x04,0x60,0x19]
316+
// CHECK: sttaddl w0, [x2] // encoding: [0x5f,0x04,0x60,0x19]
317317
// ERROR: instruction requires: lsui
318318
sttaddl w2, [sp]
319-
// CHECK: ldtaddl w2, wzr, [sp] // encoding: [0xff,0x07,0x62,0x19]
319+
// CHECK: sttaddl w2, [sp] // encoding: [0xff,0x07,0x62,0x19]
320320
// ERROR: instruction requires: lsui
321321
sttaddl x0, [x2]
322-
// CHECK: ldtaddl x0, xzr, [x2] // encoding: [0x5f,0x04,0x60,0x59]
322+
// CHECK: sttaddl x0, [x2] // encoding: [0x5f,0x04,0x60,0x59]
323323
// ERROR: instruction requires: lsui
324324
sttaddl x2, [sp]
325-
// CHECK: ldtaddl x2, xzr, [sp] // encoding: [0xff,0x07,0x62,0x59]
325+
// CHECK: sttaddl x2, [sp] // encoding: [0xff,0x07,0x62,0x59]
326326
// ERROR: instruction requires: lsui
327327

328328
sttclr w0, [x2]
329-
// CHECK: ldtclr w0, wzr, [x2] // encoding: [0x5f,0x14,0x20,0x19]
329+
// CHECK: sttclr w0, [x2] // encoding: [0x5f,0x14,0x20,0x19]
330330
// ERROR: instruction requires: lsui
331331
sttclr w2, [sp]
332-
// CHECK: ldtclr w2, wzr, [sp] // encoding: [0xff,0x17,0x22,0x19]
332+
// CHECK: sttclr w2, [sp] // encoding: [0xff,0x17,0x22,0x19]
333333
// ERROR: instruction requires: lsui
334334
sttclr x0, [x2]
335-
// CHECK: ldtclr x0, xzr, [x2] // encoding: [0x5f,0x14,0x20,0x59]
335+
// CHECK: sttclr x0, [x2] // encoding: [0x5f,0x14,0x20,0x59]
336336
// ERROR: instruction requires: lsui
337337
sttclr x2, [sp]
338-
// CHECK: ldtclr x2, xzr, [sp] // encoding: [0xff,0x17,0x22,0x59]
338+
// CHECK: sttclr x2, [sp] // encoding: [0xff,0x17,0x22,0x59]
339339
// ERROR: instruction requires: lsui
340340

341341
sttclrl w0, [x2]
342-
// CHECK: ldtclrl w0, wzr, [x2] // encoding: [0x5f,0x14,0x60,0x19]
342+
// CHECK: sttclrl w0, [x2] // encoding: [0x5f,0x14,0x60,0x19]
343343
// ERROR: instruction requires: lsui
344344
sttclrl w2, [sp]
345-
// CHECK: ldtclrl w2, wzr, [sp] // encoding: [0xff,0x17,0x62,0x19]
345+
// CHECK: sttclrl w2, [sp] // encoding: [0xff,0x17,0x62,0x19]
346346
// ERROR: instruction requires: lsui
347347
sttclrl x0, [x2]
348-
// CHECK: ldtclrl x0, xzr, [x2] // encoding: [0x5f,0x14,0x60,0x59]
348+
// CHECK: sttclrl x0, [x2] // encoding: [0x5f,0x14,0x60,0x59]
349349
// ERROR: instruction requires: lsui
350350
sttclrl x2, [sp]
351-
// CHECK: ldtclrl x2, xzr, [sp] // encoding: [0xff,0x17,0x62,0x59]
351+
// CHECK: sttclrl x2, [sp] // encoding: [0xff,0x17,0x62,0x59]
352352
// ERROR: instruction requires: lsui
353353

354354
sttset w0, [x2]
355-
// CHECK: ldtset w0, wzr, [x2] // encoding: [0x5f,0x34,0x20,0x19]
355+
// CHECK: sttset w0, [x2] // encoding: [0x5f,0x34,0x20,0x19]
356356
// ERROR: instruction requires: lsui
357357
sttset w2, [sp]
358-
// CHECK: ldtset w2, wzr, [sp] // encoding: [0xff,0x37,0x22,0x19]
358+
// CHECK: sttset w2, [sp] // encoding: [0xff,0x37,0x22,0x19]
359359
// ERROR: instruction requires: lsui
360360
sttset x0, [x2]
361-
// CHECK: ldtset x0, xzr, [x2] // encoding: [0x5f,0x34,0x20,0x59]
361+
// CHECK: sttset x0, [x2] // encoding: [0x5f,0x34,0x20,0x59]
362362
// ERROR: instruction requires: lsui
363363
sttset x2, [sp]
364-
// CHECK: ldtset x2, xzr, [sp] // encoding: [0xff,0x37,0x22,0x59]
364+
// CHECK: sttset x2, [sp] // encoding: [0xff,0x37,0x22,0x59]
365365
// ERROR: instruction requires: lsui
366366

367367
sttsetl w0, [x2]
368-
// CHECK: ldtsetl w0, wzr, [x2] // encoding: [0x5f,0x34,0x60,0x19]
368+
// CHECK: sttsetl w0, [x2] // encoding: [0x5f,0x34,0x60,0x19]
369369
// ERROR: instruction requires: lsui
370370
sttsetl w2, [sp]
371-
// CHECK: ldtsetl w2, wzr, [sp] // encoding: [0xff,0x37,0x62,0x19]
371+
// CHECK: sttsetl w2, [sp] // encoding: [0xff,0x37,0x62,0x19]
372372
// ERROR: instruction requires: lsui
373373
sttsetl x0, [x2]
374-
// CHECK: ldtsetl x0, xzr, [x2] // encoding: [0x5f,0x34,0x60,0x59]
374+
// CHECK: sttsetl x0, [x2] // encoding: [0x5f,0x34,0x60,0x59]
375375
// ERROR: instruction requires: lsui
376376
sttsetl x2, [sp]
377-
// CHECK: ldtsetl x2, xzr, [sp] // encoding: [0xff,0x37,0x62,0x59]
377+
// CHECK: sttsetl x2, [sp] // encoding: [0xff,0x37,0x62,0x59]
378378
// ERROR: instruction requires: lsui
379379

380380
//------------------------------------------------------------------------------

‎llvm/test/MC/Disassembler/AArch64/armv9.6a-lsui.txt‎

Lines changed: 60 additions & 60 deletions
Original file line numberDiff line numberDiff line change
@@ -249,75 +249,75 @@
249249
# CHECK-NEXT: casplt x0, x1, x2, x3, [sp]
250250
# CHECK-NEXT: caspalt x0, x1, x2, x3, [x4]
251251
# CHECK-NEXT: caspalt x0, x1, x2, x3, [sp]
252-
# CHECK-NEXT: ldtadd w7, wzr, [x5]
253-
# CHECK-NEXT: ldtadd x9, xzr, [sp]
252+
# CHECK-NEXT: sttadd w7, [x5]
253+
# CHECK-NEXT: sttadd x9, [sp]
254254
# CHECK-NEXT: ldtadda w7, wzr, [x5]
255255
# CHECK-NEXT: ldtadda x9, xzr, [sp]
256-
# CHECK-NEXT: ldtaddl w7, wzr, [x5]
257-
# CHECK-NEXT: ldtaddl x9, xzr, [sp]
256+
# CHECK-NEXT: sttaddl w7, [x5]
257+
# CHECK-NEXT: sttaddl x9, [sp]
258258
# CHECK-NEXT: ldtaddal w7, wzr, [x5]
259259
# CHECK-NEXT: ldtaddal x9, xzr, [sp]
260-
# CHECK-NEXT: ldtclr w7, wzr, [x5]
261-
# CHECK-NEXT: ldtclr x9, xzr, [sp]
262-
# CHECK-NEXT: ldtclrl w7, wzr, [x5]
263-
# CHECK-NEXT: ldtclrl x9, xzr, [sp]
260+
# CHECK-NEXT: sttclr w7, [x5]
261+
# CHECK-NEXT: sttclr x9, [sp]
262+
# CHECK-NEXT: sttclrl w7, [x5]
263+
# CHECK-NEXT: sttclrl x9, [sp]
264264
# CHECK-NEXT: ldtclra w7, wzr, [x5]
265265
# CHECK-NEXT: ldtclra x9, xzr, [sp]
266266
# CHECK-NEXT: ldtclral w7, wzr, [x5]
267267
# CHECK-NEXT: ldtclral x9, xzr, [sp]
268-
# CHECK-NEXT: ldtset w7, wzr, [x5]
269-
# CHECK-NEXT: ldtset x9, xzr, [sp]
270-
# CHECK-NEXT: ldtsetl w7, wzr, [x5]
271-
# CHECK-NEXT: ldtsetl x9, xzr, [sp]
268+
# CHECK-NEXT: sttset w7, [x5]
269+
# CHECK-NEXT: sttset x9, [sp]
270+
# CHECK-NEXT: sttsetl w7, [x5]
271+
# CHECK-NEXT: sttsetl x9, [sp]
272272
# CHECK-NEXT: ldtseta w7, wzr, [x5]
273273
# CHECK-NEXT: ldtseta x9, xzr, [sp]
274274
# CHECK-NEXT: ldtsetal w7, wzr, [x5]
275275
# CHECK-NEXT: ldtsetal x9, xzr, [sp]
276-
# CHECK-NEXT: ldtadd w0, wzr, [x2]
277-
# CHECK-NEXT: ldtadd w2, wzr, [sp]
278-
# CHECK-NEXT: ldtadd x0, xzr, [x2]
279-
# CHECK-NEXT: ldtadd x2, xzr, [sp]
280-
# CHECK-NEXT: ldtadd w0, wzr, [x2]
281-
# CHECK-NEXT: ldtadd w2, wzr, [sp]
282-
# CHECK-NEXT: ldtadd x0, xzr, [x2]
283-
# CHECK-NEXT: ldtadd x2, xzr, [sp]
284-
# CHECK-NEXT: ldtadd w0, wzr, [x2]
285-
# CHECK-NEXT: ldtadd w2, wzr, [sp]
286-
# CHECK-NEXT: ldtadd x0, xzr, [x2]
287-
# CHECK-NEXT: ldtadd x2, xzr, [sp]
288-
# CHECK-NEXT: ldtadd w0, wzr, [x2]
289-
# CHECK-NEXT: ldtadd w2, wzr, [sp]
290-
# CHECK-NEXT: ldtadd x0, xzr, [x2]
291-
# CHECK-NEXT: ldtadd x2, xzr, [sp]
292-
# CHECK-NEXT: ldtclr w0, wzr, [x2]
293-
# CHECK-NEXT: ldtclr w2, wzr, [sp]
294-
# CHECK-NEXT: ldtclr x0, xzr, [x2]
295-
# CHECK-NEXT: ldtclr x2, xzr, [sp]
296-
# CHECK-NEXT: ldtclr w0, wzr, [x2]
297-
# CHECK-NEXT: ldtclr w2, wzr, [sp]
298-
# CHECK-NEXT: ldtclr x0, xzr, [x2]
299-
# CHECK-NEXT: ldtclr x2, xzr, [sp]
300-
# CHECK-NEXT: ldtclr w0, wzr, [x2]
301-
# CHECK-NEXT: ldtclr w2, wzr, [sp]
302-
# CHECK-NEXT: ldtclr x0, xzr, [x2]
303-
# CHECK-NEXT: ldtclr x2, xzr, [sp]
304-
# CHECK-NEXT: ldtclr w0, wzr, [x2]
305-
# CHECK-NEXT: ldtclr x2, xzr, [sp]
306-
# CHECK-NEXT: ldtclr x0, xzr, [x2]
307-
# CHECK-NEXT: ldtclr x2, xzr, [sp]
308-
# CHECK-NEXT: ldtset w0, wzr, [x2]
309-
# CHECK-NEXT: ldtset w2, wzr, [sp]
310-
# CHECK-NEXT: ldtset x0, xzr, [x2]
311-
# CHECK-NEXT: ldtset x2, xzr, [sp]
312-
# CHECK-NEXT: ldtset w0, wzr, [x2]
313-
# CHECK-NEXT: ldtset w2, wzr, [sp]
314-
# CHECK-NEXT: ldtset x0, xzr, [x2]
315-
# CHECK-NEXT: ldtset x2, xzr, [sp]
316-
# CHECK-NEXT: ldtset w0, wzr, [x2]
317-
# CHECK-NEXT: ldtset w2, wzr, [sp]
318-
# CHECK-NEXT: ldtset x0, xzr, [x2]
319-
# CHECK-NEXT: ldtset x2, xzr, [sp]
320-
# CHECK-NEXT: ldtset w0, wzr, [x2]
321-
# CHECK-NEXT: ldtset x2, xzr, [sp]
322-
# CHECK-NEXT: ldtset x0, xzr, [x2]
323-
# CHECK-NEXT: ldtset x2, xzr, [sp]
276+
# CHECK-NEXT: sttadd w0, [x2]
277+
# CHECK-NEXT: sttadd w2, [sp]
278+
# CHECK-NEXT: sttadd x0, [x2]
279+
# CHECK-NEXT: sttadd x2, [sp]
280+
# CHECK-NEXT: sttadd w0, [x2]
281+
# CHECK-NEXT: sttadd w2, [sp]
282+
# CHECK-NEXT: sttadd x0, [x2]
283+
# CHECK-NEXT: sttadd x2, [sp]
284+
# CHECK-NEXT: sttadd w0, [x2]
285+
# CHECK-NEXT: sttadd w2, [sp]
286+
# CHECK-NEXT: sttadd x0, [x2]
287+
# CHECK-NEXT: sttadd x2, [sp]
288+
# CHECK-NEXT: sttadd w0, [x2]
289+
# CHECK-NEXT: sttadd w2, [sp]
290+
# CHECK-NEXT: sttadd x0, [x2]
291+
# CHECK-NEXT: sttadd x2, [sp]
292+
# CHECK-NEXT: sttclr w0, [x2]
293+
# CHECK-NEXT: sttclr w2, [sp]
294+
# CHECK-NEXT: sttclr x0, [x2]
295+
# CHECK-NEXT: sttclr x2, [sp]
296+
# CHECK-NEXT: sttclr w0, [x2]
297+
# CHECK-NEXT: sttclr w2, [sp]
298+
# CHECK-NEXT: sttclr x0, [x2]
299+
# CHECK-NEXT: sttclr x2, [sp]
300+
# CHECK-NEXT: sttclr w0, [x2]
301+
# CHECK-NEXT: sttclr w2, [sp]
302+
# CHECK-NEXT: sttclr x0, [x2]
303+
# CHECK-NEXT: sttclr x2, [sp]
304+
# CHECK-NEXT: sttclr w0, [x2]
305+
# CHECK-NEXT: sttclr x2, [sp]
306+
# CHECK-NEXT: sttclr x0, [x2]
307+
# CHECK-NEXT: sttclr x2, [sp]
308+
# CHECK-NEXT: sttset w0, [x2]
309+
# CHECK-NEXT: sttset w2, [sp]
310+
# CHECK-NEXT: sttset x0, [x2]
311+
# CHECK-NEXT: sttset x2, [sp]
312+
# CHECK-NEXT: sttset w0, [x2]
313+
# CHECK-NEXT: sttset w2, [sp]
314+
# CHECK-NEXT: sttset x0, [x2]
315+
# CHECK-NEXT: sttset x2, [sp]
316+
# CHECK-NEXT: sttset w0, [x2]
317+
# CHECK-NEXT: sttset w2, [sp]
318+
# CHECK-NEXT: sttset x0, [x2]
319+
# CHECK-NEXT: sttset x2, [sp]
320+
# CHECK-NEXT: sttset w0, [x2]
321+
# CHECK-NEXT: sttset x2, [sp]
322+
# CHECK-NEXT: sttset x0, [x2]
323+
# CHECK-NEXT: sttset x2, [sp]

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