Update benchmark scripts

Author: doganulus

README.md

@@ -10,9 +10,9 @@ Docker was the first containerization platform and still is the most widely used
 
 ## Run the Lab Environment
 
-### 1) Using Docker Engine
+### 1) Using Container Engine
 
-> :warning: You need [Docker Engine](https://docs.docker.com/engine/) installed on your system to proceed. You can install the engine for Ubuntu by following [installation steps](https://docs.docker.com/engine/install/ubuntu/). You can also follow [post-installation steps](https://docs.docker.com/engine/install/linux-postinstall/) to run `docker` without `sudo`.
+> :warning: You need [Docker Engine](https://docs.docker.com/engine/) or []installed on your system to proceed. You can install the engine for Ubuntu by following [installation steps](https://docs.docker.com/engine/install/ubuntu/). You can also follow [post-installation steps](https://docs.docker.com/engine/install/linux-postinstall/) to run `docker` without `sudo`.
 
 > :warning: Windows users need to use Docker Desktop with WSL2 backend. See [the installation steps](https://docs.docker.com/desktop/install/windows-install/). 
 

benchmarks/coremark/Makefile

@@ -1,26 +1,29 @@
 # Wally Coremark Makefile
-# Daniel Torres & David Harris 28 July 2022
-# Dogan Ulus 2025
+# SPDX-FileCopyrightText: 2022 Daniel Torres, David Harris
+# SPDX-FileCopyrightText: 2025 Dogan Ulus
 # SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
 
+.PHONY: clean
+
 WALLY ?= /opt/openhwgroup/cvw
-LABS344 ?= /workspaces/labs344
-
-PORT_DIR = ${WALLY}/benchmarks/coremark/riscv64-baremetal
-cmbase= ${WALLY}/addins/coremark
-work_dir= ${LABS344}/benchmarks/coremark/work
-XLEN ?=32
-sources=$(cmbase)/core_main.c $(cmbase)/core_list_join.c $(cmbase)/coremark.h  \
-	$(cmbase)/core_matrix.c $(cmbase)/core_state.c $(cmbase)/core_util.c \
-	$(PORT_DIR)/core_portme.h $(PORT_DIR)/core_portme.c $(PORT_DIR)/core_portme.mak \
-	$(PORT_DIR)/crt.S $(PORT_DIR)/encoding.h $(PORT_DIR)/util.h $(PORT_DIR)/syscalls.c
-ABI := $(if $(findstring "64","$(XLEN)"),lp64,ilp32)
-ARCH := rv$(XLEN)im_zicsr_zba_zbb_zbs
+LABS344_DIR ?= /workspaces/labs344
+
+COREMARK_BASEDIR = ${WALLY}/addins/coremark
+COREMARK_PORTDIR = ${WALLY}/benchmarks/coremark/riscv64-baremetal
+COREMARK_TMPDIR  = ${LABS344_DIR}/benchmarks/coremark/work
+
+CC = riscv64-unknown-elf-gcc
+LD = riscv64-unknown-elf-ld
+
+ARCH   := rv32gc
+XLEN   := $(if $(findstring 32,$(ARCH)),32,64)
+ABI    := $(if $(findstring 64,$(XLEN)),lp64,ilp32)
 CONFIG := rv$(XLEN)gc
-#ARCH := rv$(XLEN)gc
-#ARCH := rv$(XLEN)imc_zicsr
-#ARCH := rv$(XLEN)im_zicsr
-#ARCH := rv$(XLEN)i_zicsr
+
+sources=$(COREMARK_BASEDIR)/core_main.c $(COREMARK_BASEDIR)/core_list_join.c $(COREMARK_BASEDIR)/coremark.h  \
+	$(COREMARK_BASEDIR)/core_matrix.c $(COREMARK_BASEDIR)/core_state.c $(COREMARK_BASEDIR)/core_util.c \
+	$(COREMARK_PORTDIR)/core_portme.h $(COREMARK_PORTDIR)/core_portme.c $(COREMARK_PORTDIR)/core_portme.mak \
+	$(COREMARK_PORTDIR)/crt.S $(COREMARK_PORTDIR)/encoding.h $(COREMARK_PORTDIR)/util.h $(COREMARK_PORTDIR)/syscalls.c
 
 PORT_CFLAGS = -g -mabi=$(ABI) -march=$(ARCH) -static -falign-functions=16 \
 	-mbranch-cost=1 -DSKIP_DEFAULT_MEMSET -mtune=sifive-3-series -O3 -finline-functions -falign-jumps=4 \
@@ -29,26 +32,22 @@ PORT_CFLAGS = -g -mabi=$(ABI) -march=$(ARCH) -static -falign-functions=16 \
 	-nostdlib -nostartfiles -ffreestanding -mstrict-align \
 	-DTOTAL_DATA_SIZE=2000 -DMAIN_HAS_NOARGC=1 -DPERFORMANCE_RUN=1 -DITERATIONS=10 -DXLEN=$(XLEN) 
 
-all: $(work_dir)/coremark.bare.riscv.elf.memfile
+all: $(COREMARK_TMPDIR)/coremark.bare.riscv.elf.memfile
 
-run: $(work_dir)/coremark.bare.riscv.elf.memfile
-# 	python3 ${LABS344}/bin/wsim --sim verilator ${CONFIG} coremark 2>&1 | tee $(work_dir)/coremark.sim.log
-	make -C ${LABS344}/sim/verilator WALLYCONF=${CONFIG} TEST=coremark TESTBENCH=testbench 
+run: $(COREMARK_TMPDIR)/coremark.bare.riscv.elf.memfile
+	make -C ${LABS344_DIR}/sim/verilator WALLYCONF=${CONFIG} TEST=coremark TESTBENCH=testbench 
 
-$(work_dir)/coremark.bare.riscv.elf.memfile: $(work_dir)/coremark.bare.riscv
+$(COREMARK_TMPDIR)/coremark.bare.riscv.elf.memfile: $(COREMARK_TMPDIR)/coremark.bare.riscv
 	riscv64-unknown-elf-objdump -D $< > $<.elf.objdump
 	riscv64-unknown-elf-elf2hex --bit-width $(XLEN) --input $< --output $@
 	${WALLY}/bin/extractFunctionRadix.sh $<.elf.objdump
 
-$(work_dir)/coremark.bare.riscv: $(sources) Makefile
-	$(MAKE) -C $(cmbase) PORT_DIR=$(PORT_DIR) compile RISCV=$(RISCV) XCFLAGS="$(PORT_CFLAGS)"
-	mkdir -p $(work_dir)
-	mv $(cmbase)/coremark.bare.riscv $(work_dir)
-
-.PHONY: clean
+$(COREMARK_TMPDIR)/coremark.bare.riscv: $(sources) Makefile
+	$(MAKE) -C $(COREMARK_BASEDIR) PORT_DIR=$(COREMARK_PORTDIR) compile RISCV=$(RISCV) XCFLAGS="$(PORT_CFLAGS)"
+	mkdir -p $(COREMARK_TMPDIR)
+	mv $(COREMARK_BASEDIR)/coremark.bare.riscv $(COREMARK_TMPDIR)
 
 clean:
-	$(MAKE) -C $(cmbase) clean
-	rm -f $(work_dir)/*
-
-
+	rm -rf $(COREMARK_TMPDIR)
+	$(MAKE) -C $(COREMARK_BASEDIR) clean
+	$(MAKE) -C ${LABS344_DIR}/sim/verilator clean

benchmarks/coremark/README.md

@@ -0,0 +1,33 @@
+# Wally Coremark Tests
+
+This directory provides build and run scripts to execute the **Coremark benchmark** on the Wally RISC-V cores.  
+It supports multiple RISC-V ISA configurations for both 32-bit and 64-bit variants.
+
+## Running Tests
+
+To build and run Coremark with a specific architecture:
+
+```bash
+make run ARCH=rv32gc
+```
+
+## Supported architectures
+
+The following RISC-V ISA configurations are currently supported:
+
+- rv32i_zicsr
+- rv32im_zicsr
+- rv32imc_zicsr
+- rv32im_zicsr_zba_zbb_zbs
+- rv32gc
+- rv32gc_zba_zbb_zbs
+- rv64i_zicsr
+- rv64im_zicsr
+- rv64imc_zicsr
+- rv64im_zicsr_zba_zbb_zbs
+- rv64gc
+- rv64gc_zba_zbb_zbs
+
+## Notes
+
+- Benchmark results may differ across architectures due to instruction set extensions and optimization differences.

containers/labs344/Dockerfile

@@ -117,32 +117,6 @@ RUN git clone https://github.com/riscv-software-src/riscv-isa-sim \
     make install && \
     rm -rf /tmp/riscv-isa-sim
 
-# RUN git clone https://github.com/verilator/verilator \
-#         --no-checkout \
-#         /tmp/verilator \
-#         &&\
-#     cd /tmp/verilator && \
-#     git checkout ${VERILATOR_VERSION} && \ 
-#     cmake -S . -B build -G Ninja \
-#         -DCMAKE_INSTALL_PREFIX=/usr/local \
-#         -DCMAKE_BUILD_TYPE=Release \
-#         && \
-#     cmake --build build -j"$(nproc)" && \
-#     cmake --install build && \
-#     rm -rf /tmp/verilator
-
-# RUN git clone "https://github.com/verilator/verilator" \
-#         --no-checkout \
-#         /tmp/verilator \
-#         &&\
-#     cd /tmp/verilator && \
-#     git checkout ${VERILATOR_VERSION} && \ 
-#     autoconf && \ 
-#     ./configure --prefix="/usr/local" && \ 
-#     make -j "$(nproc)" && \ 
-#     make install && \ 
-#     rm -rf /tmp/verilator
-
 FROM labs344-base as labs344-runtime
 ARG TARGETARCH TARGETOS TARGETPLATFORM TARGETVARIANT
 
@@ -156,11 +130,7 @@ COPY --from=labs344-toolchain ${RISCV_INSTALL_PREFIX} ${RISCV_INSTALL_PREFIX}
 COPY --from=labs344-toolchain /usr/local /usr/local
 
 ENV WALLY_SOURCE_DIR=/opt/openhwgroup/cvw
-
-ENV LABS344_HOME=/root
 ENV LABS344_SOURCE_DIR=/workspaces/labs344
-ENV LABS344_PYTHON_VENV_DIR=${LABS344_HOME}/.venv/labs344
-ENV LABS344_PYTHON_EXECUTABLE=${LABS344_PYTHON_VENV_DIR}/bin/python
 
 # Aliases used in Wally scripts
 ENV RISCV=${RISCV_INSTALL_PREFIX}

sim/verilator/Makefile

@@ -1,8 +1,8 @@
 # Verilator Makefile for WALLY
-# Kunlin Han, Rose Thompson, David Harris 2024
+# SPDX-FileCopyrightText: 2024 Kunlin Han, Rose Thompson, David Harris 
+# SPDX-FileCopyrightText: 2025 Dogan Ulus 
 # SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
 
-SHELL := /bin/bash
 WALLY ?= /opt/openhwgroup/cvw
 LABS344 ?= /workspaces/labs344
 
@@ -12,7 +12,7 @@ LABS344 ?= /workspaces/labs344
 OPT=--assert
 PARAMS?=--no-trace-top
 NONPROF?=--stats
-VERILATOR_DIR=${LABS344}/sim/verilator
+VERILATOR_DIR=${WALLY}/sim/verilator
 PLUS_ARGS=
 PARAM_ARGS=
 DEFINE_ARGS=
@@ -25,13 +25,13 @@ TESTBENCH?=testbench
 # constants
 # assume WALLY variable is correctly configured in the shell environment
 # INCLUDE_PATH are paths that Verilator should search for files it needs
-INCLUDE_PATH="-I${WALLY}/config/shared" "-I${WALLY}/config/$(WALLYCONF)" "-I${WALLY}/config/deriv/$(WALLYCONF)" "-I/usr/share/verilator/include"
+INCLUDE_PATH="-I${WALLY}/config/shared" "-I${WALLY}/config/$(WALLYCONF)" "-I${WALLY}/config/deriv/$(WALLYCONF)"
 # SOURCES are source files
 SOURCES=${WALLY}/src/cvw.sv ${WALLY}/testbench/${TESTBENCH}.sv ${WALLY}/testbench/common/*.sv ${WALLY}/src/*/*.sv ${WALLY}/src/*/*/*.sv ${WALLY}/addins/verilog-ethernet/*/*.sv ${WALLY}/addins/verilog-ethernet/*/*/*/*.sv
 # DEPENDENCIES are configuration files and source files, which leads to recompilation of executables
 DEPENDENCIES=${WALLY}/config/shared/*.vh $(SOURCES)
 
-WORKDIR = $(VERILATOR_DIR)/wkdir/$(WALLYCONF)_$(TEST)
+WORKDIR = /tmp/verilator/$(WALLYCONF)_$(TEST)
 
 # regular testbench requires a wrapper defining getenvval
 ifeq ($(TESTBENCH), testbench)

tutorials/fibonacci/README.md

@@ -30,10 +30,10 @@ The `fibonacci.elf` is a binary executable in the ELF format, containing the RIS
 Disassembling the ELF file means we convert the binary file `fibonacci.elf` in a human-readable textual file. We can disassemble ELF objects and executable using the program `objdump` as follows:
 
 ```bash
-riscv64-unknown-elf-objdump --disassemble fibonacci.elf > fibonacci.txt
+riscv64-unknown-elf-objdump --disassemble fibonacci.elf > fibonacci.objdump
 ```
 
-Now check out the contents of `fibonacci.txt`, which is a plain text file, in your text editor. It should look like this:
+Now check out the contents of `fibonacci.objdump`, which is a plain text file, in your text editor. It should look like this:
 
 ```
 fibonacci.elf:     file format elf32-littleriscv
@@ -64,7 +64,34 @@ Disassembly of section .text:
    100d4:	0000006f          	j	100d4 <DONE>
 ```
 
-The `fibonacci.txt` file is a disassembled version of our assembled code. It provides a more detailed view of the instructions and data, including the assigned memory addresses and the substitution of pseudo-instructions with their corresponding RISC-V machine code. These changes are performed by the assembler during the compilation process.
+The `fibonacci.objdump` file is a disassembled version of our assembled code. It provides a more detailed view of the instructions and data, including the assigned memory addresses and the substitution of pseudo-instructions with their corresponding RISC-V machine code. These changes are performed by the assembler during the compilation process.
+
+## Simulate using Spike
+
+Our desktop computers typically use `x86_64` processors, which are incompatible with RISC-V executables like `fibonacci.elf`. If you have a computer equipped with a RISC-V processor, you can directly execute `fibonacci.elf` on it.
+
+For those using `x86-64` or `arm64` processors, it is possible to simulate RISC-V executables using RISC-V ISA simulators. The `spike` simulator is a production-grade RISC-V ISA simulator available in our lab's development environment. Please check its installation by running the following command:
+
+```bash
+spike --help
+```
+
+If you see `spike` help text, everything is set up correctly.
+
+We first use the simulator in the interactive mode, where we can instruct commands to the simulator one by one. To start the simulation of `fibonacci.elf` in the interactive mode, please run the command in your terminal as follows:
+
+```
+spike -d fibonacci.elf
+```
+
+Now you are in the interactive shell where you can give commands to the simulator. You can find the most commonly used commands for `spike` in the following table.
+
+
+| Interactive commands     | Description                                                |
+|--------------------------|------------------------------------------------------------|
+| `[<ENTER>]`              | Proceed 1 steps.                                           |
+| `run [<N>]` or `r [<N>]` | Proceed `N` steps, default is 1.                           |
+
 
 ## Simulate using Whisper