fix pci_enable_msi/pci_enable_msix, so now ahci uses msi

Author: braindigitalis

build-usb.php

@@ -15,12 +15,15 @@
 const VOL_LABEL = 'RETROROCKET';
 const HEADROOM_MB = 64;
 
-chdir(LIMINE_DIR);
-run('env -u MAKEFLAGS -u MFLAGS -u MAKELEVEL make -j1 CC="/usr/bin/gcc -B/usr/bin/" >/dev/null');
-chdir(BUILD_DIR);
+
 
 if (!is_file(LIMINE_BIN) || !is_executable(LIMINE_BIN)) {
-    throw new RuntimeException("limine build failed: missing or non-executable '" . LIMINE_BIN . "'");
+    chdir(LIMINE_DIR);
+    run('env -u MAKEFLAGS -u MFLAGS -u MAKELEVEL make -j1 CC="/usr/bin/gcc -B/usr/bin/" >/dev/null');
+    chdir(BUILD_DIR);
+    if (!is_file(LIMINE_BIN) || !is_executable(LIMINE_BIN)) {
+        throw new RuntimeException("limine build failed: missing or non-executable '" . LIMINE_BIN . "'");
+    }
 }
 function run(string $cmd, array $env = []): void {
     $proc = proc_open($cmd, [1=>['pipe','w'], 2=>['pipe','w']], $pipes, null, $env + $_ENV);

include/pci.h

@@ -83,9 +83,7 @@ extern pci_dev_t dev_zero;
 
 #define PCI_CAPABILITY_MSI	 0x05
 #define PCI_MSI_64BIT		 (1 << 7)
-#define PCI_MSI_DEASSERT	 (1 << 14)
-#define PCI_MSI_EDGETRIGGER	 (1 << 15)
-#define PCI_MSI_ENABLE		 (1 << 16)
+#define PCI_MSI_ENABLE		 (1 << 0)
 
 #define PCI_CAPABILITY_MSIX	 0x11
 

src/pci.c

@@ -414,12 +414,29 @@ void pci_display_device_list()
 			// Don't list bridges
 			continue;
 		}
+		bool msi = false, msix = false;
+		/* Check for MSI/MSI-X capability */
+		uint16_t status = pci_read16(list[n], PCI_STATUS);
+		if (status & PCI_STATUS_CAPABILITIES_LIST) {
+			uint8_t cap = pci_read8(list[n], PCI_CAPABILITY_POINTER);
+			while (cap) {
+				uint8_t id   = pci_read8(list[n], cap + 0x00);
+				uint8_t next = pci_read8(list[n], cap + 0x01);
+				if (id == PCI_CAPABILITY_MSI) {
+					msi = true;
+				} else if (id == PCI_CAPABILITY_MSIX) {
+					msix = true;
+				}
+				cap = next;
+			}
+		}
 		dprintf(
-			"%02x:%02x:%02x: %s (%04x:%04x) [%02x:%02x:%02x]\n",
+			"%02x:%02x:%02x: %s (%04x:%04x) [%02x:%02x:%02x] %s%s\n",
 			list[n].bus_num, list[n].device_num, list[n].function_num,
 			device_description,
 			pci_read(list[n], PCI_VENDOR_ID), pci_read(list[n], PCI_DEVICE_ID),
-			class, subclass, progif
+			class, subclass, progif,
+			msi ? "MSI" : "", msix ? "MSI-X" : ""
 		);
 	}
 }
@@ -820,52 +837,52 @@ uint64_t get_bar_size(pci_dev_t dev, int bar_index) {
 }
 
 bool pci_disable_bus_master(pci_dev_t device) {
-        uint32_t cmd = pci_read(device, PCI_COMMAND);
-        if ((cmd & PCI_COMMAND_BUS_MASTER) != 0) {
-                cmd &= ~PCI_COMMAND_BUS_MASTER;
-                pci_write(device, PCI_COMMAND, cmd);
-                cmd = pci_read(device, PCI_COMMAND);
-        }
-        return (cmd & PCI_COMMAND_BUS_MASTER) == 0;
+	uint32_t cmd = pci_read(device, PCI_COMMAND);
+	if ((cmd & PCI_COMMAND_BUS_MASTER) != 0) {
+		cmd &= ~PCI_COMMAND_BUS_MASTER;
+		pci_write(device, PCI_COMMAND, cmd);
+		cmd = pci_read(device, PCI_COMMAND);
+	}
+	return (cmd & PCI_COMMAND_BUS_MASTER) == 0;
 }
 
 bool pci_enable_iospace(pci_dev_t device) {
-        uint32_t cmd = pci_read(device, PCI_COMMAND);
-        if ((cmd & PCI_COMMAND_IOSPACE) == 0) {
-                cmd |= PCI_COMMAND_IOSPACE;
-                pci_write(device, PCI_COMMAND, cmd);
-                cmd = pci_read(device, PCI_COMMAND);
-        }
-        return (cmd & PCI_COMMAND_IOSPACE) != 0;
+	uint32_t cmd = pci_read(device, PCI_COMMAND);
+	if ((cmd & PCI_COMMAND_IOSPACE) == 0) {
+		cmd |= PCI_COMMAND_IOSPACE;
+		pci_write(device, PCI_COMMAND, cmd);
+		cmd = pci_read(device, PCI_COMMAND);
+	}
+	return (cmd & PCI_COMMAND_IOSPACE) != 0;
 }
 
 bool pci_enable_memspace(pci_dev_t device) {
-        uint32_t cmd = pci_read(device, PCI_COMMAND);
-        if ((cmd & PCI_COMMAND_MEMSPACE) == 0) {
-                cmd |= PCI_COMMAND_MEMSPACE;
-                pci_write(device, PCI_COMMAND, cmd);
-                cmd = pci_read(device, PCI_COMMAND);
-        }
-        return (cmd & PCI_COMMAND_MEMSPACE) != 0;
+	uint32_t cmd = pci_read(device, PCI_COMMAND);
+	if ((cmd & PCI_COMMAND_MEMSPACE) == 0) {
+		cmd |= PCI_COMMAND_MEMSPACE;
+		pci_write(device, PCI_COMMAND, cmd);
+		cmd = pci_read(device, PCI_COMMAND);
+	}
+	return (cmd & PCI_COMMAND_MEMSPACE) != 0;
 }
 
 bool pci_disable_iospace(pci_dev_t device) {
-        uint32_t cmd = pci_read(device, PCI_COMMAND);
-        if ((cmd & PCI_COMMAND_IOSPACE) != 0) {
-                cmd &= ~PCI_COMMAND_IOSPACE;
-                pci_write(device, PCI_COMMAND, cmd);
-                cmd = pci_read(device, PCI_COMMAND);
-        }
-        return (cmd & PCI_COMMAND_IOSPACE) == 0;
+	uint32_t cmd = pci_read(device, PCI_COMMAND);
+	if ((cmd & PCI_COMMAND_IOSPACE) != 0) {
+		cmd &= ~PCI_COMMAND_IOSPACE;
+		pci_write(device, PCI_COMMAND, cmd);
+		cmd = pci_read(device, PCI_COMMAND);
+	}
+	return (cmd & PCI_COMMAND_IOSPACE) == 0;
 }
 
 bool pci_disable_memspace(pci_dev_t device) {
-        uint32_t cmd = pci_read(device, PCI_COMMAND);
-        if ((cmd & PCI_COMMAND_MEMSPACE) != 0) {
-                cmd &= ~PCI_COMMAND_MEMSPACE;
-                pci_write(device, PCI_COMMAND, cmd);
-                cmd = pci_read(device, PCI_COMMAND);
-        }
-        return (cmd & PCI_COMMAND_MEMSPACE) == 0;
+	uint32_t cmd = pci_read(device, PCI_COMMAND);
+	if ((cmd & PCI_COMMAND_MEMSPACE) != 0) {
+		cmd &= ~PCI_COMMAND_MEMSPACE;
+		pci_write(device, PCI_COMMAND, cmd);
+		cmd = pci_read(device, PCI_COMMAND);
+	}
+	return (cmd & PCI_COMMAND_MEMSPACE) == 0;
 }