Correct allocd_within_constraint to account for allocating of clobbers to late phase registers.

Ditch reservation of registers for reg-only operands for using a counters to determine whether or not registers should be allocated to operands with Any constraints

Author: d-sonuga

src/fastalloc/lru.rs

@@ -272,6 +272,8 @@ pub struct PartedByRegClass<T> {
     pub items: [T; 3],
 }
 
+impl<T: Copy> Copy for PartedByRegClass<T> {}
+
 impl<T> Index<RegClass> for PartedByRegClass<T> {
     type Output = T;
 
@@ -286,6 +288,12 @@ impl<T> IndexMut<RegClass> for PartedByRegClass<T> {
     }
 }
 
+impl<T: PartialEq> PartialEq for PartedByRegClass<T> {
+    fn eq(&self, other: &Self) -> bool {
+        self.items.eq(&other.items)
+    }
+}
+
 /// Least-recently-used caches for register classes Int, Float, and Vector, respectively.
 pub type Lrus = PartedByRegClass<Lru>;