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wenyonghwenyongh
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Refactor emitting callnative/callbc IRs (#1206)
And remove clear_values for opcode br_if as the jit registers can be used in the same basic block.
1 parent 95eb0e3 commit 5e9f08f

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8 files changed

+311
-273
lines changed

8 files changed

+311
-273
lines changed

‎core/iwasm/fast-jit/cg/x86-64/jit_codegen_x86_64.cpp‎

Lines changed: 98 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -573,7 +573,12 @@ extend_r32_to_r64(x86::Assembler &a, int32 reg_no_dst, int32 reg_no_src,
573573
a.movsxd(regs_i64[reg_no_dst], regs_i32[reg_no_src]);
574574
}
575575
else {
576-
a.xor_(regs_i64[reg_no_dst], regs_i64[reg_no_dst]);
576+
/*
577+
* The upper 32-bit will be zero-extended, ref to Intel document,
578+
* 3.4.1.1 General-Purpose Registers: 32-bit operands generate
579+
* a 32-bit result, zero-extended to a 64-bit result in the
580+
* destination general-purpose register
581+
*/
577582
a.mov(regs_i32[reg_no_dst], regs_i32[reg_no_src]);
578583
}
579584
return true;
@@ -653,10 +658,15 @@ mov_m_to_r(x86::Assembler &a, uint32 bytes_dst, uint32 kind_dst, bool is_signed,
653658
case 4:
654659
if (is_signed)
655660
a.movsxd(regs_i64[reg_no_dst], m_src);
656-
else {
657-
a.xor_(regs_i64[reg_no_dst], regs_i64[reg_no_dst]);
658-
a.mov(regs_i64[reg_no_dst], m_src);
659-
}
661+
else
662+
/*
663+
* The upper 32-bit will be zero-extended, ref to Intel
664+
* document, 3.4.1.1 General-Purpose Registers: 32-bit
665+
* operands generate a 32-bit result, zero-extended to
666+
* a 64-bit result in the destination general-purpose
667+
* register
668+
*/
669+
a.mov(regs_i32[reg_no_dst], m_src);
660670
break;
661671
case 8:
662672
a.mov(regs_i64[reg_no_dst], m_src);
@@ -2961,7 +2971,7 @@ alu_imm_r_to_r_f32(x86::Assembler &a, ALU_OP op, int32 reg_no_dst,
29612971
/* xmm -> m128 */
29622972
x86::Mem cache = x86::xmmword_ptr(regs_i64[hreg_info->exec_env_hreg_index],
29632973
offsetof(WASMExecEnv, jit_cache));
2964-
a.movaps(cache, regs_float[reg_no2_src]);
2974+
a.movups(cache, regs_float[reg_no2_src]);
29652975

29662976
/* imm -> gp -> xmm */
29672977
mov_imm_to_r_f32(a, reg_no_dst, data1_src);
@@ -3135,7 +3145,7 @@ alu_imm_r_to_r_f64(x86::Assembler &a, ALU_OP op, int32 reg_no_dst,
31353145
/* xmm -> m128 */
31363146
x86::Mem cache = x86::qword_ptr(regs_i64[hreg_info->exec_env_hreg_index],
31373147
offsetof(WASMExecEnv, jit_cache));
3138-
a.movapd(cache, regs_float[reg_no2_src]);
3148+
a.movupd(cache, regs_float[reg_no2_src]);
31393149

31403150
/* imm -> gp -> xmm */
31413151
mov_imm_to_r_f64(a, reg_no_dst, data1_src);
@@ -4214,7 +4224,7 @@ cmp_imm_r_to_r_f32(x86::Assembler &a, int32 reg_no_dst, float data1_src,
42144224
/* xmm -> m128 */
42154225
x86::Mem cache = x86::xmmword_ptr(regs_i64[hreg_info->exec_env_hreg_index],
42164226
offsetof(WASMExecEnv, jit_cache));
4217-
a.movaps(cache, regs_float[reg_no2_src]);
4227+
a.movups(cache, regs_float[reg_no2_src]);
42184228

42194229
/* imm -> gp -> xmm */
42204230
mov_imm_to_r_f32(a, reg_no2_src, data1_src);
@@ -4309,7 +4319,7 @@ cmp_imm_r_to_r_f64(x86::Assembler &a, int32 reg_no_dst, double data1_src,
43094319
/* xmm -> m128 */
43104320
x86::Mem cache = x86::qword_ptr(regs_i64[hreg_info->exec_env_hreg_index],
43114321
offsetof(WASMExecEnv, jit_cache));
4312-
a.movapd(cache, regs_float[reg_no2_src]);
4322+
a.movupd(cache, regs_float[reg_no2_src]);
43134323

43144324
/* imm -> gp -> xmm */
43154325
mov_imm_to_r_f64(a, reg_no2_src, data1_src);
@@ -6151,32 +6161,62 @@ jit_codegen_gen_native(JitCompContext *cc)
61516161

61526162
case JIT_OP_LDI8:
61536163
LOAD_3ARGS();
6154-
LD_R_R_R(I32, 1, true);
6164+
bh_assert(jit_reg_kind(r0) == JIT_REG_KIND_I32
6165+
|| jit_reg_kind(r0) == JIT_REG_KIND_I64);
6166+
if (jit_reg_kind(r0) == JIT_REG_KIND_I32)
6167+
LD_R_R_R(I32, 1, true);
6168+
else
6169+
LD_R_R_R(I64, 1, true);
61556170
break;
61566171

61576172
case JIT_OP_LDU8:
61586173
LOAD_3ARGS();
6159-
LD_R_R_R(I32, 1, false);
6174+
bh_assert(jit_reg_kind(r0) == JIT_REG_KIND_I32
6175+
|| jit_reg_kind(r0) == JIT_REG_KIND_I64);
6176+
if (jit_reg_kind(r0) == JIT_REG_KIND_I32)
6177+
LD_R_R_R(I32, 1, false);
6178+
else
6179+
LD_R_R_R(I64, 1, false);
61606180
break;
61616181

61626182
case JIT_OP_LDI16:
61636183
LOAD_3ARGS();
6164-
LD_R_R_R(I32, 2, true);
6184+
bh_assert(jit_reg_kind(r0) == JIT_REG_KIND_I32
6185+
|| jit_reg_kind(r0) == JIT_REG_KIND_I64);
6186+
if (jit_reg_kind(r0) == JIT_REG_KIND_I32)
6187+
LD_R_R_R(I32, 2, true);
6188+
else
6189+
LD_R_R_R(I64, 2, true);
61656190
break;
61666191

61676192
case JIT_OP_LDU16:
61686193
LOAD_3ARGS();
6169-
LD_R_R_R(I32, 2, false);
6194+
bh_assert(jit_reg_kind(r0) == JIT_REG_KIND_I32
6195+
|| jit_reg_kind(r0) == JIT_REG_KIND_I64);
6196+
if (jit_reg_kind(r0) == JIT_REG_KIND_I32)
6197+
LD_R_R_R(I32, 2, false);
6198+
else
6199+
LD_R_R_R(I64, 2, false);
61706200
break;
61716201

61726202
case JIT_OP_LDI32:
61736203
LOAD_3ARGS();
6174-
LD_R_R_R(I32, 4, true);
6204+
bh_assert(jit_reg_kind(r0) == JIT_REG_KIND_I32
6205+
|| jit_reg_kind(r0) == JIT_REG_KIND_I64);
6206+
if (jit_reg_kind(r0) == JIT_REG_KIND_I32)
6207+
LD_R_R_R(I32, 4, true);
6208+
else
6209+
LD_R_R_R(I64, 4, true);
61756210
break;
61766211

61776212
case JIT_OP_LDU32:
61786213
LOAD_3ARGS();
6179-
LD_R_R_R(I32, 4, false);
6214+
bh_assert(jit_reg_kind(r0) == JIT_REG_KIND_I32
6215+
|| jit_reg_kind(r0) == JIT_REG_KIND_I64);
6216+
if (jit_reg_kind(r0) == JIT_REG_KIND_I32)
6217+
LD_R_R_R(I32, 4, false);
6218+
else
6219+
LD_R_R_R(I64, 4, false);
61806220
break;
61816221

61826222
case JIT_OP_LDI64:
@@ -6574,29 +6614,52 @@ jit_codegen_get_hreg_info()
65746614
return &hreg_info;
65756615
}
65766616

6617+
static const char *reg_names_i32[] = {
6618+
"ebp", "eax", "ebx", "ecx", "edx", "edi", "esi", "esp",
6619+
};
6620+
6621+
static const char *reg_names_i64[] = {
6622+
"rbp", "rax", "rbx", "rcx", "rdx", "rdi", "rsi", "rsp",
6623+
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
6624+
};
6625+
6626+
static const char *reg_names_f32[] = { "xmm0", "xmm1", "xmm2", "xmm3",
6627+
"xmm4", "xmm5", "xmm6", "xmm7",
6628+
"xmm8", "xmm9", "xmm10", "xmm11",
6629+
"xmm12", "xmm13", "xmm14", "xmm15" };
6630+
6631+
static const char *reg_names_f64[] = {
6632+
"xmm0_f64", "xmm1_f64", "xmm2_f64", "xmm3_f64", "xmm4_f64", "xmm5_f64",
6633+
"xmm6_f64", "xmm7_f64", "xmm8_f64", "xmm9_f64", "xmm10_f64", "xmm11_f64",
6634+
"xmm12_f64", "xmm13_f64", "xmm14_f64", "xmm15_f64"
6635+
};
6636+
65776637
JitReg
65786638
jit_codegen_get_hreg_by_name(const char *name)
65796639
{
6580-
if (strcmp(name, "eax") == 0)
6581-
return jit_reg_new(JIT_REG_KIND_I32, REG_EAX_IDX);
6582-
else if (strcmp(name, "ecx") == 0)
6583-
return jit_reg_new(JIT_REG_KIND_I32, REG_ECX_IDX);
6584-
else if (strcmp(name, "edx") == 0)
6585-
return jit_reg_new(JIT_REG_KIND_I32, REG_EDX_IDX);
6586-
else if (strcmp(name, "esi") == 0)
6587-
return jit_reg_new(JIT_REG_KIND_I32, REG_ESI_IDX);
6588-
else if (strcmp(name, "rax") == 0)
6589-
return jit_reg_new(JIT_REG_KIND_I64, REG_RAX_IDX);
6590-
else if (strcmp(name, "rcx") == 0)
6591-
return jit_reg_new(JIT_REG_KIND_I64, REG_RCX_IDX);
6592-
else if (strcmp(name, "rdx") == 0)
6593-
return jit_reg_new(JIT_REG_KIND_I64, REG_RDX_IDX);
6594-
else if (strcmp(name, "r9") == 0)
6595-
return jit_reg_new(JIT_REG_KIND_I64, REG_R9_IDX);
6596-
else if (strcmp(name, "xmm0") == 0)
6597-
return jit_reg_new(JIT_REG_KIND_F32, 0);
6598-
else if (strcmp(name, "xmm0_f64") == 0)
6599-
return jit_reg_new(JIT_REG_KIND_F64, 0);
6640+
size_t i;
66006641

6642+
if (name[0] == 'e') {
6643+
for (i = 0; i < sizeof(reg_names_i32) / sizeof(char *); i++)
6644+
if (!strcmp(reg_names_i32[i], name))
6645+
return jit_reg_new(JIT_REG_KIND_I32, i);
6646+
}
6647+
else if (name[0] == 'r') {
6648+
for (i = 0; i < sizeof(reg_names_i64) / sizeof(char *); i++)
6649+
if (!strcmp(reg_names_i64[i], name))
6650+
return jit_reg_new(JIT_REG_KIND_I64, i);
6651+
}
6652+
else if (!strncmp(name, "xmm", 3)) {
6653+
if (!strstr(name, "_f64")) {
6654+
for (i = 0; i < sizeof(reg_names_f32) / sizeof(char *); i++)
6655+
if (!strcmp(reg_names_f32[i], name))
6656+
return jit_reg_new(JIT_REG_KIND_F32, i);
6657+
}
6658+
else {
6659+
for (i = 0; i < sizeof(reg_names_f64) / sizeof(char *); i++)
6660+
if (!strcmp(reg_names_f64[i], name))
6661+
return jit_reg_new(JIT_REG_KIND_F64, i);
6662+
}
6663+
}
66016664
return 0;
66026665
}

‎core/iwasm/fast-jit/fe/jit_emit_compare.c‎

Lines changed: 18 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@
44
*/
55

66
#include "jit_emit_compare.h"
7+
#include "jit_emit_function.h"
78
#include "../jit_frontend.h"
89
#include "../jit_codegen.h"
910

@@ -120,7 +121,7 @@ jit_compile_op_i64_compare(JitCompContext *cc, IntCond cond)
120121
static int32
121122
float_cmp_eq(float f1, float f2)
122123
{
123-
if (isnan(f1) || isnan(f2))
124+
if (isnanf(f1) || isnanf(f2))
124125
return 0;
125126

126127
return f1 == f2;
@@ -129,7 +130,7 @@ float_cmp_eq(float f1, float f2)
129130
static int32
130131
float_cmp_ne(float f1, float f2)
131132
{
132-
if (isnan(f1) || isnan(f2))
133+
if (isnanf(f1) || isnanf(f2))
133134
return 1;
134135

135136
return f1 != f2;
@@ -157,53 +158,26 @@ static bool
157158
jit_compile_op_compare_float_point(JitCompContext *cc, FloatCond cond,
158159
JitReg lhs, JitReg rhs)
159160
{
160-
JitReg res, const_zero, const_one;
161-
162-
if (cond == FLOAT_EQ) {
163-
JitInsn *insn = NULL;
164-
JitRegKind kind = jit_reg_kind(lhs);
161+
JitReg res, args[2], const_zero, const_one;
162+
JitRegKind kind;
163+
void *func;
164+
165+
if (cond == FLOAT_EQ || cond == FLOAT_NE) {
166+
kind = jit_reg_kind(lhs);
167+
if (cond == FLOAT_EQ)
168+
func = (kind == JIT_REG_KIND_F32) ? (void *)float_cmp_eq
169+
: (void *)double_cmp_eq;
170+
else
171+
func = (kind == JIT_REG_KIND_F32) ? (void *)float_cmp_ne
172+
: (void *)double_cmp_ne;
165173

166-
#if defined(BUILD_TARGET_X86_64) || defined(BUILD_TARGET_AMD_64)
167-
res = jit_codegen_get_hreg_by_name("eax");
168-
#else
169174
res = jit_cc_new_reg_I32(cc);
170-
#endif
175+
args[0] = lhs;
176+
args[1] = rhs;
171177

172-
if (kind == JIT_REG_KIND_F32) {
173-
insn = GEN_INSN(CALLNATIVE, res,
174-
NEW_CONST(PTR, (uintptr_t)float_cmp_eq), 2);
175-
}
176-
else {
177-
insn = GEN_INSN(CALLNATIVE, res,
178-
NEW_CONST(PTR, (uintptr_t)double_cmp_eq), 2);
179-
}
180-
if (!insn) {
181-
goto fail;
182-
}
183-
*(jit_insn_opndv(insn, 2)) = lhs;
184-
*(jit_insn_opndv(insn, 3)) = rhs;
185-
}
186-
else if (cond == FLOAT_NE) {
187-
JitInsn *insn = NULL;
188-
JitRegKind kind = jit_reg_kind(lhs);
189-
#if defined(BUILD_TARGET_X86_64) || defined(BUILD_TARGET_AMD_64)
190-
res = jit_codegen_get_hreg_by_name("eax");
191-
#else
192-
res = jit_cc_new_reg_I32(cc);
193-
#endif
194-
if (kind == JIT_REG_KIND_F32) {
195-
insn = GEN_INSN(CALLNATIVE, res,
196-
NEW_CONST(PTR, (uintptr_t)float_cmp_ne), 2);
197-
}
198-
else {
199-
insn = GEN_INSN(CALLNATIVE, res,
200-
NEW_CONST(PTR, (uintptr_t)double_cmp_ne), 2);
201-
}
202-
if (!insn) {
178+
if (!jit_emit_callnative(cc, func, res, args, 2)) {
203179
goto fail;
204180
}
205-
*(jit_insn_opndv(insn, 2)) = lhs;
206-
*(jit_insn_opndv(insn, 3)) = rhs;
207181
}
208182
else {
209183
res = jit_cc_new_reg_I32(cc);

‎core/iwasm/fast-jit/fe/jit_emit_control.c‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -852,8 +852,6 @@ jit_compile_op_br_if(JitCompContext *cc, uint32 br_depth, uint8 **p_frame_ip)
852852
jit_frame = cc->jit_frame;
853853
cur_basic_block = cc->cur_basic_block;
854854
gen_commit_values(jit_frame, jit_frame->lp, jit_frame->sp);
855-
/* Clear frame values */
856-
clear_values(jit_frame);
857855

858856
if (block_dst->label_type == LABEL_TYPE_LOOP) {
859857
frame_sp_src =

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