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Implement inn.extend8_s, inn.extend16_s, i64.extend32_s (#1199)
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3 files changed

+293
-7
lines changed

3 files changed

+293
-7
lines changed

core/iwasm/fast-jit/cg/x86-64/jit_codegen_x86_64.cpp

Lines changed: 219 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1207,6 +1207,126 @@ mov_r_to_r_f64(x86::Assembler &a, int32 reg_no_dst, int32 reg_no_src)
12071207

12081208
/* Let compiler do the conversation job as much as possible */
12091209

1210+
/**
1211+
* Encoding convert int8 immediate data to int32 register
1212+
*
1213+
* @param a the assembler to emit the code
1214+
* @param reg_no the dst register, need to be converted to int32
1215+
* @param data the src int8 immediate data
1216+
*
1217+
* @return true if success, false otherwise
1218+
*/
1219+
static bool
1220+
convert_imm_i8_to_r_i32(x86::Assembler &a, int32 reg_no, int8 data)
1221+
{
1222+
return mov_imm_to_r_i32(a, reg_no, (int32)data);
1223+
}
1224+
1225+
/**
1226+
* encoding convert int8 register to int32 register
1227+
*
1228+
* @param a the assembler to emit the code
1229+
* @param reg_no_dst the dst register
1230+
* @param reg_no_src the src register
1231+
*
1232+
* @return true if success, false otherwise
1233+
*/
1234+
static bool
1235+
convert_r_i8_to_r_i32(x86::Assembler &a, int32 reg_no_dst, int32 reg_no_src)
1236+
{
1237+
return extend_r8_to_r32(a, reg_no_dst, reg_no_src, true);
1238+
}
1239+
1240+
/**
1241+
* encoding convert int8 immediate data to int64 register
1242+
*
1243+
* @param a the assembler to emit the code
1244+
* @param reg_no the dst register, need to be converted to int64
1245+
* @param data the src int8 immediate data
1246+
*
1247+
* @return true if success, false otherwise
1248+
*/
1249+
static bool
1250+
convert_imm_i8_to_r_i64(x86::Assembler &a, int32 reg_no, int8 data)
1251+
{
1252+
return mov_imm_to_r_i64(a, reg_no, (int64)data);
1253+
}
1254+
1255+
/**
1256+
* encoding convert int8 register to int64 register
1257+
*
1258+
* @param a the assembler to emit the code
1259+
* @param reg_no_dst the dst register
1260+
* @param reg_no_src the src register
1261+
*
1262+
* @return true if success, false otherwise
1263+
*/
1264+
static bool
1265+
convert_r_i8_to_r_i64(x86::Assembler &a, int32 reg_no_dst, int32 reg_no_src)
1266+
{
1267+
return extend_r8_to_r64(a, reg_no_dst, reg_no_src, true);
1268+
}
1269+
1270+
/**
1271+
* Encoding convert int16 immediate data to int32 register
1272+
*
1273+
* @param a the assembler to emit the code
1274+
* @param reg_no the dst register, need to be converted to int32
1275+
* @param data the src int16 immediate data
1276+
*
1277+
* @return true if success, false otherwise
1278+
*/
1279+
static bool
1280+
convert_imm_i16_to_r_i32(x86::Assembler &a, int32 reg_no, int16 data)
1281+
{
1282+
return mov_imm_to_r_i32(a, reg_no, (int32)data);
1283+
}
1284+
1285+
/**
1286+
* encoding convert int16 register to int32 register
1287+
*
1288+
* @param a the assembler to emit the code
1289+
* @param reg_no_dst the dst register
1290+
* @param reg_no_src the src register
1291+
*
1292+
* @return true if success, false otherwise
1293+
*/
1294+
static bool
1295+
convert_r_i16_to_r_i32(x86::Assembler &a, int32 reg_no_dst, int32 reg_no_src)
1296+
{
1297+
return extend_r16_to_r32(a, reg_no_dst, reg_no_src, true);
1298+
}
1299+
1300+
/**
1301+
* encoding convert int16 immediate data to int64 register
1302+
*
1303+
* @param a the assembler to emit the code
1304+
* @param reg_no the dst register, need to be converted to int64
1305+
* @param data the src int16 immediate data
1306+
*
1307+
* @return true if success, false otherwise
1308+
*/
1309+
static bool
1310+
convert_imm_i16_to_r_i64(x86::Assembler &a, int32 reg_no, int16 data)
1311+
{
1312+
return mov_imm_to_r_i64(a, reg_no, (int64)data);
1313+
}
1314+
1315+
/**
1316+
* encoding convert int16 register to int64 register
1317+
*
1318+
* @param a the assembler to emit the code
1319+
* @param reg_no_dst the dst register
1320+
* @param reg_no_src the src register
1321+
*
1322+
* @return true if success, false otherwise
1323+
*/
1324+
static bool
1325+
convert_r_i16_to_r_i64(x86::Assembler &a, int32 reg_no_dst, int32 reg_no_src)
1326+
{
1327+
return extend_r16_to_r64(a, reg_no_dst, reg_no_src, true);
1328+
}
1329+
12101330
/**
12111331
* Encoding convert int32 immediate data to int8 register
12121332
*
@@ -1441,7 +1561,7 @@ convert_imm_i32_to_r_f64(x86::Assembler &a, int32 reg_no, int32 data)
14411561
static bool
14421562
convert_imm_i64_to_r_i32(x86::Assembler &a, int32 reg_no, int64 data)
14431563
{
1444-
return mov_imm_to_r_i32(a, reg_no, (int32)data);
1564+
return mov_imm_to_r_i64(a, reg_no, (int32)data);
14451565
}
14461566

14471567
/**
@@ -1461,6 +1581,70 @@ convert_r_i64_to_r_i32(x86::Assembler &a, int32 reg_no_dst, int32 reg_no_src)
14611581
return true;
14621582
}
14631583

1584+
/**
1585+
* Encode converting int64 immediate data to int8 register data
1586+
*
1587+
* @param a the assembler to emit the code
1588+
* @param reg_no the no of dst int32 register
1589+
* @param data the src immediate int64 data
1590+
*
1591+
* @return true if success, false otherwise
1592+
*/
1593+
static bool
1594+
convert_imm_i64_to_r_i8(x86::Assembler &a, int32 reg_no, int64 data)
1595+
{
1596+
return mov_imm_to_r_i64(a, reg_no, (int8)data);
1597+
}
1598+
1599+
/**
1600+
* Encode converting int64 register data to int8 register data
1601+
*
1602+
* @param a the assembler to emit the code
1603+
* @param reg_no_dst the no of dst int8 register
1604+
* @param reg_no_src the no of src int64 register
1605+
*
1606+
* @return true if success, false otherwise
1607+
*/
1608+
static bool
1609+
convert_r_i64_to_r_i8(x86::Assembler &a, int32 reg_no_dst, int32 reg_no_src)
1610+
{
1611+
mov_r_to_r_i64(a, reg_no_dst, reg_no_src);
1612+
a.and_(regs_i64[reg_no_dst], 0x00000000000000FFLL);
1613+
return true;
1614+
}
1615+
1616+
/**
1617+
* Encode converting int64 immediate data to int16 register data
1618+
*
1619+
* @param a the assembler to emit the code
1620+
* @param reg_no the no of dst int32 register
1621+
* @param data the src immediate int64 data
1622+
*
1623+
* @return true if success, false otherwise
1624+
*/
1625+
static bool
1626+
convert_imm_i64_to_r_i16(x86::Assembler &a, int32 reg_no, int64 data)
1627+
{
1628+
return mov_imm_to_r_i64(a, reg_no, (int16)data);
1629+
}
1630+
1631+
/**
1632+
* Encode converting int64 register data to int16 register data
1633+
*
1634+
* @param a the assembler to emit the code
1635+
* @param reg_no_dst the no of dst int16 register
1636+
* @param reg_no_src the no of src int64 register
1637+
*
1638+
* @return true if success, false otherwise
1639+
*/
1640+
static bool
1641+
convert_r_i64_to_r_i16(x86::Assembler &a, int32 reg_no_dst, int32 reg_no_src)
1642+
{
1643+
mov_r_to_r_i64(a, reg_no_dst, reg_no_src);
1644+
a.and_(regs_i64[reg_no_dst], 0x000000000000FFFFLL);
1645+
return true;
1646+
}
1647+
14641648
/**
14651649
* Encode converting uint32 immediate data to int64 register data
14661650
*
@@ -5623,6 +5807,26 @@ jit_codegen_gen_native(JitCompContext *cc)
56235807
GOTO_FAIL;
56245808
break;
56255809

5810+
case JIT_OP_I8TOI32:
5811+
LOAD_2ARGS();
5812+
CONVERT_R_R(I32, I32, i32, i8, int8);
5813+
break;
5814+
5815+
case JIT_OP_I8TOI64:
5816+
LOAD_2ARGS();
5817+
CONVERT_R_R(I64, I64, i64, i8, int8);
5818+
break;
5819+
5820+
case JIT_OP_I16TOI32:
5821+
LOAD_2ARGS();
5822+
CONVERT_R_R(I32, I32, i32, i16, int16);
5823+
break;
5824+
5825+
case JIT_OP_I16TOI64:
5826+
LOAD_2ARGS();
5827+
CONVERT_R_R(I64, I64, i64, i16, int16);
5828+
break;
5829+
56265830
case JIT_OP_I32TOI8:
56275831
LOAD_2ARGS();
56285832
CONVERT_R_R(I32, I32, i8, i32, int32);
@@ -5670,7 +5874,17 @@ jit_codegen_gen_native(JitCompContext *cc)
56705874

56715875
case JIT_OP_U32TOF64:
56725876
LOAD_2ARGS();
5673-
CONVERT_R_R(F64, I32, f64, u32, int32);
5877+
CONVERT_R_R(F64, I32, f64, u32, uint32);
5878+
break;
5879+
5880+
case JIT_OP_I64TOI8:
5881+
LOAD_2ARGS();
5882+
CONVERT_R_R(I64, I64, i8, i64, int64);
5883+
break;
5884+
5885+
case JIT_OP_I64TOI16:
5886+
LOAD_2ARGS();
5887+
CONVERT_R_R(I64, I64, i16, i64, int64);
56745888
break;
56755889

56765890
case JIT_OP_I64TOI32:
@@ -5690,12 +5904,12 @@ jit_codegen_gen_native(JitCompContext *cc)
56905904

56915905
case JIT_OP_F32TOI32:
56925906
LOAD_2ARGS();
5693-
CONVERT_R_R(I32, F32, i32, f32, int32);
5907+
CONVERT_R_R(I32, F32, i32, f32, float32);
56945908
break;
56955909

56965910
case JIT_OP_F32TOI64:
56975911
LOAD_2ARGS();
5698-
CONVERT_R_R(I64, F32, i64, f32, int32);
5912+
CONVERT_R_R(I64, F32, i64, f32, float32);
56995913
break;
57005914

57015915
case JIT_OP_F32TOF64:
@@ -5705,7 +5919,7 @@ jit_codegen_gen_native(JitCompContext *cc)
57055919

57065920
case JIT_OP_F32TOU32:
57075921
LOAD_2ARGS();
5708-
CONVERT_R_R(I32, F32, u32, f32, int32);
5922+
CONVERT_R_R(I32, F32, u32, f32, float32);
57095923
break;
57105924

57115925
case JIT_OP_F64TOI32:

core/iwasm/fast-jit/fe/jit_emit_conversion.c

Lines changed: 68 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -206,14 +206,80 @@ jit_compile_op_i64_extend_i32(JitCompContext *cc, bool sign)
206206
bool
207207
jit_compile_op_i64_extend_i64(JitCompContext *cc, int8 bitwidth)
208208
{
209-
bh_assert(0);
209+
JitReg value, tmp, res;
210+
211+
POP_I64(value);
212+
213+
tmp = jit_cc_new_reg_I64(cc);
214+
res = jit_cc_new_reg_I64(cc);
215+
216+
switch (bitwidth) {
217+
case 8:
218+
{
219+
GEN_INSN(I64TOI8, tmp, value);
220+
GEN_INSN(I8TOI64, res, tmp);
221+
break;
222+
}
223+
case 16:
224+
{
225+
GEN_INSN(I64TOI16, tmp, value);
226+
GEN_INSN(I16TOI64, res, tmp);
227+
break;
228+
}
229+
case 32:
230+
{
231+
GEN_INSN(I64TOI32, tmp, value);
232+
GEN_INSN(I32TOI64, res, tmp);
233+
break;
234+
}
235+
default:
236+
{
237+
bh_assert(0);
238+
goto fail;
239+
}
240+
}
241+
242+
PUSH_I64(res);
243+
244+
return true;
245+
fail:
210246
return false;
211247
}
212248

213249
bool
214250
jit_compile_op_i32_extend_i32(JitCompContext *cc, int8 bitwidth)
215251
{
216-
bh_assert(0);
252+
JitReg value, tmp, res;
253+
254+
POP_I32(value);
255+
256+
tmp = jit_cc_new_reg_I32(cc);
257+
res = jit_cc_new_reg_I32(cc);
258+
259+
switch (bitwidth) {
260+
case 8:
261+
{
262+
GEN_INSN(I32TOI8, tmp, value);
263+
GEN_INSN(I8TOI32, res, tmp);
264+
break;
265+
}
266+
case 16:
267+
{
268+
GEN_INSN(I32TOI16, tmp, value);
269+
GEN_INSN(I16TOI32, res, tmp);
270+
break;
271+
}
272+
default:
273+
{
274+
bh_assert(0);
275+
goto fail;
276+
}
277+
}
278+
279+
PUSH_I32(res);
280+
281+
return true;
282+
fail:
217283
return false;
218284
}
219285

core/iwasm/fast-jit/jit_ir.def

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -78,6 +78,10 @@ INSN(MOV, Reg, 2, 1)
7878
INSN(PHI, VReg, 1, 1)
7979

8080
/* conversion. will extend or truncate */
81+
INSN(I8TOI32, Reg, 2, 1)
82+
INSN(I8TOI64, Reg, 2, 1)
83+
INSN(I16TOI32, Reg, 2, 1)
84+
INSN(I16TOI64, Reg, 2, 1)
8185
INSN(I32TOI8, Reg, 2, 1)
8286
INSN(I32TOU8, Reg, 2, 1)
8387
INSN(I32TOI16, Reg, 2, 1)
@@ -88,6 +92,8 @@ INSN(I32TOF64, Reg, 2, 1)
8892
INSN(U32TOI64, Reg, 2, 1)
8993
INSN(U32TOF32, Reg, 2, 1)
9094
INSN(U32TOF64, Reg, 2, 1)
95+
INSN(I64TOI8, Reg, 2, 1)
96+
INSN(I64TOI16, Reg, 2, 1)
9197
INSN(I64TOI32, Reg, 2, 1)
9298
INSN(I64TOF32, Reg, 2, 1)
9399
INSN(I64TOF64, Reg, 2, 1)

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