Implement fast jit float/double load/store opcodes translation (#1165)

Author: lum1n0us

core/iwasm/fast-jit/cg/x86-64/jit_codegen_x86_64.cpp

@@ -81,6 +81,25 @@ x86::Gp regs_i64[] = {
     x86::r8,  x86::r9,  x86::r10, x86::r11,
     x86::r12, x86::r13, x86::r14, x86::r15,
 };
+
+x86::Xmm regs_float[] = {
+    x86::xmm0,
+    x86::xmm1,
+    x86::xmm2,
+    x86::xmm3,
+    x86::xmm4,
+    x86::xmm5,
+    x86::xmm6,
+    x86::xmm7,
+    x86::xmm8,
+    x86::xmm9,
+    x86::xmm10,
+    x86::xmm11,
+    x86::xmm12,
+    x86::xmm13,
+    x86::xmm14,
+    x86::xmm15,
+};
 /* clang-format on */
 
 int
@@ -611,12 +630,10 @@ mov_m_to_r(x86::Assembler &a, uint32 bytes_dst, uint32 kind_dst, bool is_signed,
         }
     }
     else if (kind_dst == JIT_REG_KIND_F32) {
-        /* TODO */
-        return false;
+        a.movss(regs_float[reg_no_dst], m_src);
     }
     else if (kind_dst == JIT_REG_KIND_F64) {
-        /* TODO */
-        return false;
+        a.movsd(regs_float[reg_no_dst], m_src);
     }
     return true;
 }
@@ -677,12 +694,10 @@ mov_r_to_m(x86::Assembler &a, uint32 bytes_dst, uint32 kind_dst,
         }
     }
     else if (kind_dst == JIT_REG_KIND_F32) {
-        /* TODO */
-        return false;
+        a.movss(m_dst, regs_float[reg_no_src]);
     }
     else if (kind_dst == JIT_REG_KIND_F64) {
-        /* TODO */
-        return false;
+        a.movsd(m_dst, regs_float[reg_no_src]);
     }
     return true;
 }
@@ -5217,21 +5232,23 @@ static const uint8 hreg_info_I64[3][16] = {
 };
 
 static uint8 hreg_info_F32[3][16] = {
+    /* xmm0 ~ xmm15 */
     { 0, 0, 0, 0, 0, 0, 0, 0,
-      1, 1, 1, 1, 1, 1, 1, 1 }, /* fixed, rsi is freely used */
+      1, 1, 1, 1, 1, 1, 1, 1 },
     { 1, 1, 1, 1, 1, 1, 1, 1,
-      1, 1, 1, 1, 1, 1, 1, 1 }, /* caller_saved_native */
+      1, 1, 1, 1, 1, 1, 1, 1 }, /* TBD:caller_saved_native */
     { 1, 1, 1, 1, 1, 1, 1, 1,
-      1, 1, 1, 1, 1, 1, 1, 1 }, /* caller_saved_jitted */
+      1, 1, 1, 1, 1, 1, 1, 1 }, /* TBD:caller_saved_jitted */
 };
 
 static uint8 hreg_info_F64[3][16] = {
+    /* xmm0 ~ xmm15 */
     { 1, 1, 1, 1, 1, 1, 1, 1,
-      0, 0, 0, 0, 0, 0, 0, 0 }, /* fixed, rsi is freely used */
+      0, 0, 0, 0, 0, 0, 0, 0 },
     { 1, 1, 1, 1, 1, 1, 1, 1,
-      1, 1, 1, 1, 1, 1, 1, 1 }, /* caller_saved_native */
+      1, 1, 1, 1, 1, 1, 1, 1 }, /* TBD:caller_saved_native */
     { 1, 1, 1, 1, 1, 1, 1, 1,
-      1, 1, 1, 1, 1, 1, 1, 1 }, /* caller_saved_jitted */
+      1, 1, 1, 1, 1, 1, 1, 1 }, /* TBD:caller_saved_jitted */
 };
 
 static const JitHardRegInfo hreg_info = {

core/iwasm/fast-jit/fe/jit_emit_control.c

@@ -304,7 +304,7 @@ copy_block_arities(JitCompContext *cc, JitReg dst_frame_sp, uint8 *dst_types,
                 break;
             case VALUE_TYPE_F64:
                 value = gen_load_f64(jit_frame, offset_src);
-                GEN_INSN(STI64, value, dst_frame_sp,
+                GEN_INSN(STF64, value, dst_frame_sp,
                          NEW_CONST(I32, offset_dst * 4));
                 offset_src += 2;
                 offset_dst += 2;

core/iwasm/fast-jit/fe/jit_emit_memory.c

@@ -294,12 +294,42 @@ jit_compile_op_i64_load(JitCompContext *cc, uint32 align, uint32 offset,
 bool
 jit_compile_op_f32_load(JitCompContext *cc, uint32 align, uint32 offset)
 {
+    JitReg addr, maddr, value;
+
+    POP_I32(addr);
+
+    maddr = check_and_seek(cc, addr, offset, 4);
+    if (!maddr) {
+        goto fail;
+    }
+
+    value = jit_cc_new_reg_F32(cc);
+    GEN_INSN(LDF32, value, maddr, NEW_CONST(I32, 0));
+
+    PUSH_F32(value);
+    return true;
+fail:
     return false;
 }
 
 bool
 jit_compile_op_f64_load(JitCompContext *cc, uint32 align, uint32 offset)
 {
+    JitReg addr, maddr, value;
+
+    POP_I32(addr);
+
+    maddr = check_and_seek(cc, addr, offset, 8);
+    if (!maddr) {
+        goto fail;
+    }
+
+    value = jit_cc_new_reg_F64(cc);
+    GEN_INSN(LDF64, value, maddr, NEW_CONST(I32, 0));
+
+    PUSH_F64(value);
+    return true;
+fail:
     return false;
 }
 
@@ -395,12 +425,40 @@ jit_compile_op_i64_store(JitCompContext *cc, uint32 align, uint32 offset,
 bool
 jit_compile_op_f32_store(JitCompContext *cc, uint32 align, uint32 offset)
 {
+    JitReg value, addr, maddr;
+
+    POP_F32(value);
+    POP_I32(addr);
+
+    maddr = check_and_seek(cc, addr, offset, 4);
+    if (!maddr) {
+        goto fail;
+    }
+
+    GEN_INSN(STF32, value, maddr, NEW_CONST(I32, 0));
+
+    return true;
+fail:
     return false;
 }
 
 bool
 jit_compile_op_f64_store(JitCompContext *cc, uint32 align, uint32 offset)
 {
+    JitReg value, addr, maddr;
+
+    POP_F64(value);
+    POP_I32(addr);
+
+    maddr = check_and_seek(cc, addr, offset, 8);
+    if (!maddr) {
+        goto fail;
+    }
+
+    GEN_INSN(STF64, value, maddr, NEW_CONST(I32, 0));
+
+    return true;
+fail:
     return false;
 }