Update the log dependency (#11197)

* Update the `log` dependency

This enables getting warnings about formatting strings in the `log`
crate directives which are then additionally fixed here as well.

* Update dependency directive in `Cargo.toml`

Author: alexcrichton

Cargo.lock

@@ -351,7 +351,7 @@ addr2line = { version = "0.24.1", default-features = false }
 anyhow = { version = "1.0.93", default-features = false }
 windows-sys = "0.59.0"
 env_logger = "0.11.5"
-log = { version = "0.4.8", default-features = false }
+log = { version = "0.4.27", default-features = false }
 clap = { version = "4.5.17", default-features = false, features = ["std", "derive"] }
 clap_complete = "4.4.7"
 hashbrown = { version = "0.15", default-features = false }

Cargo.toml

@@ -198,12 +198,7 @@ where
 
             self.available_block[result] = self.get_available_block(inst);
             let opt_value = self.optimize_pure_enode(inst);
-            log::trace!(
-                "optimizing inst {} orig result {} gave {}",
-                inst,
-                result,
-                opt_value
-            );
+            log::trace!("optimizing inst {inst} orig result {result} gave {opt_value}");
 
             let gvn_context = GVNContext {
                 value_lists: &self.func.dfg.value_lists,

cranelift/codegen/src/egraph.rs

@@ -81,7 +81,7 @@ impl TargetIsa for AArch64Backend {
         let dynamic_stackslot_offsets = emit_result.dynamic_stackslot_offsets;
 
         if let Some(disasm) = emit_result.disasm.as_ref() {
-            log::debug!("disassembly:\n{}", disasm);
+            log::debug!("disassembly:\n{disasm}");
         }
 
         Ok(CompiledCodeStencil {

cranelift/codegen/src/isa/aarch64/mod.rs

@@ -183,7 +183,7 @@ where
         let dynamic_stackslot_offsets = emit_result.dynamic_stackslot_offsets;
 
         if let Some(disasm) = emit_result.disasm.as_ref() {
-            log::debug!("disassembly:\n{}", disasm);
+            log::debug!("disassembly:\n{disasm}");
         }
 
         Ok(CompiledCodeStencil {

cranelift/codegen/src/isa/pulley_shared/mod.rs

@@ -80,7 +80,7 @@ impl TargetIsa for Riscv64Backend {
         let dynamic_stackslot_offsets = emit_result.dynamic_stackslot_offsets;
 
         if let Some(disasm) = emit_result.disasm.as_ref() {
-            log::debug!("disassembly:\n{}", disasm);
+            log::debug!("disassembly:\n{disasm}");
         }
 
         Ok(CompiledCodeStencil {

cranelift/codegen/src/isa/riscv64/mod.rs

@@ -81,7 +81,7 @@ impl TargetIsa for S390xBackend {
         let dynamic_stackslot_offsets = emit_result.dynamic_stackslot_offsets;
 
         if let Some(disasm) = emit_result.disasm.as_ref() {
-            log::debug!("disassembly:\n{}", disasm);
+            log::debug!("disassembly:\n{disasm}");
         }
 
         Ok(CompiledCodeStencil {

cranelift/codegen/src/isa/s390x/mod.rs

@@ -73,10 +73,7 @@ pub fn compile<B: LowerBackend + TargetIsa>(
         regalloc2::run(&vcode, vcode.abi.machine_env(), &options)
             .map_err(|err| {
                 log::error!(
-                    "Register allocation error for vcode\n{:?}\nError: {:?}\nCLIF for error:\n{:?}",
-                    vcode,
-                    err,
-                    f,
+                    "Register allocation error for vcode\n{vcode:?}\nError: {err:?}\nCLIF for error:\n{f:?}",
                 );
                 err
             })
@@ -91,11 +88,7 @@ pub fn compile<B: LowerBackend + TargetIsa>(
         checker
             .run()
             .map_err(|err| {
-                log::error!(
-                    "Register allocation checker errors:\n{:?}\nfor vcode:\n{:?}",
-                    err,
-                    vcode
-                );
+                log::error!("Register allocation checker errors:\n{err:?}\nfor vcode:\n{vcode:?}");
                 err
             })
             .expect("register allocation checker");

cranelift/codegen/src/machinst/compile.rs

@@ -232,7 +232,7 @@ mod enabled {
     impl Profiler for DefaultProfiler {
         fn start_pass(&self, pass: Pass) -> Box<dyn Any> {
             let prev = CURRENT_PASS.with(|p| p.replace(pass));
-            log::debug!("timing: Starting {}, (during {})", pass, prev);
+            log::debug!("timing: Starting {pass}, (during {prev})");
             Box::new(DefaultTimingToken {
                 start: Instant::now(),
                 pass,

cranelift/codegen/src/timing.rs

@@ -160,7 +160,7 @@ fn worker_thread(
                     });
 
                 if let Err(ref msg) = result {
-                    error!("FAIL: {}", msg);
+                    error!("FAIL: {msg}");
                 }
 
                 replies.send(Reply::Done { jobid, result }).unwrap();