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lines changed Original file line number Diff line number Diff line change 39483948 (add_logical_mem_zext32_with_flags_paired ty y (sink_uload32 x))
39493949 (trap_if_impl (mask_as_cond 3) tc)))
39503950
3951+ ;;;; Rules for `uadd_overflow` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3952+
3953+ (rule 0 (lower (has_type (ty_32_or_64 ty) (uadd_overflow x y)))
3954+ (let ((sum Reg (add_reg ty x y))
3955+ (overflow Reg
3956+ (lower_bool $I8
3957+ (bool (icmpu_reg ty sum x) (intcc_as_cond (IntCC.UnsignedLessThan))))))
3958+ (output_pair sum overflow)))
3959+
39513960;;;; Rules for `return` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
39523961
39533962(rule (lower (return args))
Original file line number Diff line number Diff line change 1+ test compile precise-output
2+ target s390x
3+
4+ function %f2(i32, i32) -> i32, i8 {
5+ block0(v0: i32, v1: i32):
6+ v2, v3 = uadd_overflow v0, v1
7+ return v2, v3
8+ }
9+
10+ ; VCode:
11+ ; block0:
12+ ; ark %r5, %r2, %r3
13+ ; clr %r5, %r2
14+ ; lhi %r3, 0
15+ ; lochil %r3, 1
16+ ; lgr %r2, %r5
17+ ; br %r14
18+ ;
19+ ; Disassembled:
20+ ; block0: ; offset 0x0
21+ ; ark %r5, %r2, %r3
22+ ; clr %r5, %r2
23+ ; lhi %r3, 0
24+ ; lochil %r3, 1
25+ ; lgr %r2, %r5
26+ ; br %r14
27+
28+ function %f4(i64, i64) -> i64, i8 {
29+ block0(v0: i64, v1: i64):
30+ v2, v3 = uadd_overflow v0, v1
31+ return v2, v3
32+ }
33+
34+ ; VCode:
35+ ; block0:
36+ ; agrk %r5, %r2, %r3
37+ ; clgr %r5, %r2
38+ ; lhi %r3, 0
39+ ; lochil %r3, 1
40+ ; lgr %r2, %r5
41+ ; br %r14
42+ ;
43+ ; Disassembled:
44+ ; block0: ; offset 0x0
45+ ; agrk %r5, %r2, %r3
46+ ; clgr %r5, %r2
47+ ; lhi %r3, 0
48+ ; lochil %r3, 1
49+ ; lgr %r2, %r5
50+ ; br %r14
51+
Original file line number Diff line number Diff line change 11test interpret
22test run
33set enable_llvm_abi_extensions=true
4- target aarch64
54set enable_multi_ret_implicit_sret
65target x86_64
6+ target aarch64
77target riscv64
8+ target s390x
89target pulley32
910target pulley32be
1011target pulley64
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