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jeffcharlesjeffcharles
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Winch: Add SIMD conversion operators for x64 with AVX (#10180)
* Winch: Add SIMD conversion operators for x64 with AVX * Update method name after merge
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28 files changed

+1657
-23
lines changed

28 files changed

+1657
-23
lines changed

‎crates/wast-util/src/lib.rs‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -420,15 +420,11 @@ impl WastTest {
420420
// simd-related failures
421421
"annotations/simd_lane.wast",
422422
"memory64/simd.wast",
423-
"misc_testsuite/int-to-float-splat.wast",
424-
"misc_testsuite/issue6562.wast",
425423
"misc_testsuite/simd/almost-extmul.wast",
426424
"misc_testsuite/simd/canonicalize-nan.wast",
427-
"misc_testsuite/simd/cvt-from-uint.wast",
428425
"misc_testsuite/simd/issue_3327_bnot_lowering.wast",
429426
"spec_testsuite/simd_bit_shift.wast",
430427
"spec_testsuite/simd_boolean.wast",
431-
"spec_testsuite/simd_conversions.wast",
432428
"spec_testsuite/simd_f32x4.wast",
433429
"spec_testsuite/simd_f32x4_arith.wast",
434430
"spec_testsuite/simd_f32x4_pmin_pmax.wast",
@@ -456,7 +452,6 @@ impl WastTest {
456452
"spec_testsuite/simd_i8x16_arith.wast",
457453
"spec_testsuite/simd_i8x16_arith2.wast",
458454
"spec_testsuite/simd_i8x16_sat_arith.wast",
459-
"spec_testsuite/simd_int_to_int_extend.wast",
460455
"spec_testsuite/simd_lane.wast",
461456
"spec_testsuite/simd_load.wast",
462457
"spec_testsuite/simd_load_zero.wast",
@@ -471,18 +466,23 @@ impl WastTest {
471466
#[cfg(target_arch = "x86_64")]
472467
if !(std::is_x86_feature_detected!("avx") && std::is_x86_feature_detected!("avx2")) {
473468
let unsupported = [
469+
"misc_testsuite/int-to-float-splat.wast",
470+
"misc_testsuite/issue6562.wast",
471+
"misc_testsuite/simd/cvt-from-uint.wast",
474472
"misc_testsuite/simd/issue6725-no-egraph-panic.wast",
475473
"misc_testsuite/simd/replace-lane-preserve.wast",
476474
"misc_testsuite/simd/spillslot-size-fuzzbug.wast",
477475
"misc_testsuite/winch/_simd_lane.wast",
478476
"misc_testsuite/winch/_simd_splat.wast",
479477
"spec_testsuite/simd_align.wast",
478+
"spec_testsuite/simd_conversions.wast",
480479
"spec_testsuite/simd_f32x4_cmp.wast",
481480
"spec_testsuite/simd_f64x2_cmp.wast",
482481
"spec_testsuite/simd_i16x8_cmp.wast",
483482
"spec_testsuite/simd_i32x4_cmp.wast",
484483
"spec_testsuite/simd_i64x2_cmp.wast",
485484
"spec_testsuite/simd_i8x16_cmp.wast",
485+
"spec_testsuite/simd_int_to_int_extend.wast",
486486
"spec_testsuite/simd_load_extend.wast",
487487
"spec_testsuite/simd_load_splat.wast",
488488
"spec_testsuite/simd_store16_lane.wast",

‎tests/disas/winch/x64/f32x4_convert_i32x4_s/const_avx.wat‎

Lines changed: 35 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,35 @@
1+
;;! target = "x86_64"
2+
;;! test = "winch"
3+
;;! flags = [ "-Ccranelift-has-avx" ]
4+
5+
(module
6+
(func (result v128)
7+
(f32x4.convert_i32x4_s (v128.const i32x4 0 1 2 3))
8+
)
9+
)
10+
;; wasm[0]::function[0]:
11+
;; pushq %rbp
12+
;; movq %rsp, %rbp
13+
;; movq 8(%rdi), %r11
14+
;; movq 0x10(%r11), %r11
15+
;; addq $0x10, %r11
16+
;; cmpq %rsp, %r11
17+
;; ja 0x3e
18+
;; 1c: movq %rdi, %r14
19+
;; subq $0x10, %rsp
20+
;; movq %rdi, 8(%rsp)
21+
;; movq %rsi, (%rsp)
22+
;; movdqu 0xc(%rip), %xmm0
23+
;; vcvtdq2ps %xmm0, %xmm0
24+
;; addq $0x10, %rsp
25+
;; popq %rbp
26+
;; retq
27+
;; 3e: ud2
28+
;; 40: addb %al, (%rax)
29+
;; 42: addb %al, (%rax)
30+
;; 44: addl %eax, (%rax)
31+
;; 46: addb %al, (%rax)
32+
;; 48: addb (%rax), %al
33+
;; 4a: addb %al, (%rax)
34+
;; 4c: addl (%rax), %eax
35+
;; 4e: addb %al, (%rax)

‎tests/disas/winch/x64/f32x4_convert_i32x4_u/const_avx.wat‎

Lines changed: 49 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,49 @@
1+
;;! target = "x86_64"
2+
;;! test = "winch"
3+
;;! flags = [ "-Ccranelift-has-avx" ]
4+
5+
(module
6+
(func (result v128)
7+
(f32x4.convert_i32x4_u (v128.const i32x4 0 1 2 3))
8+
)
9+
)
10+
;; wasm[0]::function[0]:
11+
;; pushq %rbp
12+
;; movq %rsp, %rbp
13+
;; movq 8(%rdi), %r11
14+
;; movq 0x10(%r11), %r11
15+
;; addq $0x10, %r11
16+
;; cmpq %rsp, %r11
17+
;; ja 0x60
18+
;; 1c: movq %rdi, %r14
19+
;; subq $0x10, %rsp
20+
;; movq %rdi, 8(%rsp)
21+
;; movq %rsi, (%rsp)
22+
;; movdqu 0x3c(%rip), %xmm0
23+
;; vpslld $0x10, %xmm0, %xmm15
24+
;; vpsrld $0x10, %xmm15, %xmm15
25+
;; vpsubd %xmm15, %xmm0, %xmm0
26+
;; vcvtdq2ps %xmm15, %xmm15
27+
;; vpsrld $1, %xmm0, %xmm0
28+
;; vcvtdq2ps %xmm0, %xmm0
29+
;; vaddps %xmm0, %xmm0, %xmm0
30+
;; vaddps %xmm0, %xmm15, %xmm0
31+
;; addq $0x10, %rsp
32+
;; popq %rbp
33+
;; retq
34+
;; 60: ud2
35+
;; 62: addb %al, (%rax)
36+
;; 64: addb %al, (%rax)
37+
;; 66: addb %al, (%rax)
38+
;; 68: addb %al, (%rax)
39+
;; 6a: addb %al, (%rax)
40+
;; 6c: addb %al, (%rax)
41+
;; 6e: addb %al, (%rax)
42+
;; 70: addb %al, (%rax)
43+
;; 72: addb %al, (%rax)
44+
;; 74: addl %eax, (%rax)
45+
;; 76: addb %al, (%rax)
46+
;; 78: addb (%rax), %al
47+
;; 7a: addb %al, (%rax)
48+
;; 7c: addl (%rax), %eax
49+
;; 7e: addb %al, (%rax)

‎tests/disas/winch/x64/f32x4_demote_f64x2_zero/const_avx.wat‎

Lines changed: 34 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,34 @@
1+
;;! target = "x86_64"
2+
;;! test = "winch"
3+
;;! flags = [ "-Ccranelift-has-avx" ]
4+
5+
(module
6+
(func (result v128)
7+
(f32x4.demote_f64x2_zero (v128.const f64x2 0 1))
8+
)
9+
)
10+
;; wasm[0]::function[0]:
11+
;; pushq %rbp
12+
;; movq %rsp, %rbp
13+
;; movq 8(%rdi), %r11
14+
;; movq 0x10(%r11), %r11
15+
;; addq $0x10, %r11
16+
;; cmpq %rsp, %r11
17+
;; ja 0x3e
18+
;; 1c: movq %rdi, %r14
19+
;; subq $0x10, %rsp
20+
;; movq %rdi, 8(%rsp)
21+
;; movq %rsi, (%rsp)
22+
;; movdqu 0xc(%rip), %xmm0
23+
;; vcvtpd2ps %xmm0, %xmm0
24+
;; addq $0x10, %rsp
25+
;; popq %rbp
26+
;; retq
27+
;; 3e: ud2
28+
;; 40: addb %al, (%rax)
29+
;; 42: addb %al, (%rax)
30+
;; 44: addb %al, (%rax)
31+
;; 46: addb %al, (%rax)
32+
;; 48: addb %al, (%rax)
33+
;; 4a: addb %al, (%rax)
34+
;; 4c: addb %al, (%rax)

‎tests/disas/winch/x64/f64x2_convert_low_i32x4_s/const_avx.wat‎

Lines changed: 35 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,35 @@
1+
;;! target = "x86_64"
2+
;;! test = "winch"
3+
;;! flags = [ "-Ccranelift-has-avx" ]
4+
5+
(module
6+
(func (result v128)
7+
(f64x2.convert_low_i32x4_s (v128.const i64x2 1 0))
8+
)
9+
)
10+
;; wasm[0]::function[0]:
11+
;; pushq %rbp
12+
;; movq %rsp, %rbp
13+
;; movq 8(%rdi), %r11
14+
;; movq 0x10(%r11), %r11
15+
;; addq $0x10, %r11
16+
;; cmpq %rsp, %r11
17+
;; ja 0x3e
18+
;; 1c: movq %rdi, %r14
19+
;; subq $0x10, %rsp
20+
;; movq %rdi, 8(%rsp)
21+
;; movq %rsi, (%rsp)
22+
;; movdqu 0xc(%rip), %xmm0
23+
;; vcvtdq2pd %xmm0, %xmm0
24+
;; addq $0x10, %rsp
25+
;; popq %rbp
26+
;; retq
27+
;; 3e: ud2
28+
;; 40: addl %eax, (%rax)
29+
;; 42: addb %al, (%rax)
30+
;; 44: addb %al, (%rax)
31+
;; 46: addb %al, (%rax)
32+
;; 48: addb %al, (%rax)
33+
;; 4a: addb %al, (%rax)
34+
;; 4c: addb %al, (%rax)
35+
;; 4e: addb %al, (%rax)

‎tests/disas/winch/x64/f64x2_convert_low_i32x4_u/const_avx.wat‎

Lines changed: 52 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,52 @@
1+
;;! target = "x86_64"
2+
;;! test = "winch"
3+
;;! flags = [ "-Ccranelift-has-avx" ]
4+
5+
(module
6+
(func (result v128)
7+
(f64x2.convert_low_i32x4_u (v128.const i64x2 1 0))
8+
)
9+
)
10+
;; wasm[0]::function[0]:
11+
;; pushq %rbp
12+
;; movq %rsp, %rbp
13+
;; movq 8(%rdi), %r11
14+
;; movq 0x10(%r11), %r11
15+
;; addq $0x10, %r11
16+
;; cmpq %rsp, %r11
17+
;; ja 0x4a
18+
;; 1c: movq %rdi, %r14
19+
;; subq $0x10, %rsp
20+
;; movq %rdi, 8(%rsp)
21+
;; movq %rsi, (%rsp)
22+
;; movdqu 0x1c(%rip), %xmm0
23+
;; vunpcklps 0x24(%rip), %xmm0, %xmm0
24+
;; vsubpd 0x2c(%rip), %xmm0, %xmm0
25+
;; addq $0x10, %rsp
26+
;; popq %rbp
27+
;; retq
28+
;; 4a: ud2
29+
;; 4c: addb %al, (%rax)
30+
;; 4e: addb %al, (%rax)
31+
;; 50: addl %eax, (%rax)
32+
;; 52: addb %al, (%rax)
33+
;; 54: addb %al, (%rax)
34+
;; 56: addb %al, (%rax)
35+
;; 58: addb %al, (%rax)
36+
;; 5a: addb %al, (%rax)
37+
;; 5c: addb %al, (%rax)
38+
;; 5e: addb %al, (%rax)
39+
;; 60: addb %al, (%rax)
40+
;; 62: xorb %al, (%rbx)
41+
;; 65: addb %dh, (%rax)
42+
;; 67: addb %al, (%r8)
43+
;; 6a: addb %al, (%rax)
44+
;; 6c: addb %al, (%rax)
45+
;; 6e: addb %al, (%rax)
46+
;; 70: addb %al, (%rax)
47+
;; 72: addb %al, (%rax)
48+
;; 74: addb %al, (%rax)
49+
;; 76: xorb %al, (%rbx)
50+
;; 79: addb %al, (%rax)
51+
;; 7b: addb %al, (%rax)
52+
;; 7d: addb %dh, (%rax)

‎tests/disas/winch/x64/f64x2_promote_low_f32x4/const_avx.wat‎

Lines changed: 35 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,35 @@
1+
;;! target = "x86_64"
2+
;;! test = "winch"
3+
;;! flags = [ "-Ccranelift-has-avx" ]
4+
5+
(module
6+
(func (result v128)
7+
(f64x2.promote_low_f32x4 (v128.const i32x4 1 2 3 4))
8+
)
9+
)
10+
;; wasm[0]::function[0]:
11+
;; pushq %rbp
12+
;; movq %rsp, %rbp
13+
;; movq 8(%rdi), %r11
14+
;; movq 0x10(%r11), %r11
15+
;; addq $0x10, %r11
16+
;; cmpq %rsp, %r11
17+
;; ja 0x3e
18+
;; 1c: movq %rdi, %r14
19+
;; subq $0x10, %rsp
20+
;; movq %rdi, 8(%rsp)
21+
;; movq %rsi, (%rsp)
22+
;; movdqu 0xc(%rip), %xmm0
23+
;; vcvtps2pd %xmm0, %xmm0
24+
;; addq $0x10, %rsp
25+
;; popq %rbp
26+
;; retq
27+
;; 3e: ud2
28+
;; 40: addl %eax, (%rax)
29+
;; 42: addb %al, (%rax)
30+
;; 44: addb (%rax), %al
31+
;; 46: addb %al, (%rax)
32+
;; 48: addl (%rax), %eax
33+
;; 4a: addb %al, (%rax)
34+
;; 4c: addb $0, %al
35+
;; 4e: addb %al, (%rax)

‎tests/disas/winch/x64/i16x8_extend_high_i8x16_s/const_avx.wat‎

Lines changed: 37 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,37 @@
1+
;;! target = "x86_64"
2+
;;! test = "winch"
3+
;;! flags = [ "-Ccranelift-has-avx" ]
4+
5+
(module
6+
(func (result v128)
7+
(i16x8.extend_high_i8x16_s (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15))
8+
)
9+
)
10+
;; wasm[0]::function[0]:
11+
;; pushq %rbp
12+
;; movq %rsp, %rbp
13+
;; movq 8(%rdi), %r11
14+
;; movq 0x10(%r11), %r11
15+
;; addq $0x10, %r11
16+
;; cmpq %rsp, %r11
17+
;; ja 0x45
18+
;; 1c: movq %rdi, %r14
19+
;; subq $0x10, %rsp
20+
;; movq %rdi, 8(%rsp)
21+
;; movq %rsi, (%rsp)
22+
;; movdqu 0x1c(%rip), %xmm0
23+
;; vpalignr $8, %xmm0, %xmm0, %xmm0
24+
;; vpmovsxbw %xmm0, %xmm0
25+
;; addq $0x10, %rsp
26+
;; popq %rbp
27+
;; retq
28+
;; 45: ud2
29+
;; 47: addb %al, (%rax)
30+
;; 49: addb %al, (%rax)
31+
;; 4b: addb %al, (%rax)
32+
;; 4d: addb %al, (%rax)
33+
;; 4f: addb %al, (%rax)
34+
;; 51: addl %eax, (%rdx)
35+
;; 53: addl 0x9080706(, %rax), %eax
36+
;; 5a: orb (%rbx), %cl
37+
;; 5c: orb $0xd, %al

‎tests/disas/winch/x64/i16x8_extend_high_i8x16_u/const_avx.wat‎

Lines changed: 36 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,36 @@
1+
;;! target = "x86_64"
2+
;;! test = "winch"
3+
;;! flags = [ "-Ccranelift-has-avx" ]
4+
5+
(module
6+
(func (result v128)
7+
(i16x8.extend_high_i8x16_u (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15))
8+
)
9+
)
10+
;; wasm[0]::function[0]:
11+
;; pushq %rbp
12+
;; movq %rsp, %rbp
13+
;; movq 8(%rdi), %r11
14+
;; movq 0x10(%r11), %r11
15+
;; addq $0x10, %r11
16+
;; cmpq %rsp, %r11
17+
;; ja 0x44
18+
;; 1c: movq %rdi, %r14
19+
;; subq $0x10, %rsp
20+
;; movq %rdi, 8(%rsp)
21+
;; movq %rsi, (%rsp)
22+
;; movdqu 0x1c(%rip), %xmm0
23+
;; vpxor %xmm15, %xmm15, %xmm15
24+
;; vpunpckhbw %xmm15, %xmm0, %xmm0
25+
;; addq $0x10, %rsp
26+
;; popq %rbp
27+
;; retq
28+
;; 44: ud2
29+
;; 46: addb %al, (%rax)
30+
;; 48: addb %al, (%rax)
31+
;; 4a: addb %al, (%rax)
32+
;; 4c: addb %al, (%rax)
33+
;; 4e: addb %al, (%rax)
34+
;; 50: addb %al, (%rcx)
35+
;; 52: addb (%rbx), %al
36+
;; 54: addb $5, %al

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