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refactor: move i32-related extractors to prelude.isle
1 parent 103d562 commit a7c2823

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4 files changed

+28
-24
lines changed

4 files changed

+28
-24
lines changed

cranelift/codegen/src/isa/x64/inst.isle

Lines changed: 6 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1781,18 +1781,12 @@
17811781
(extern extractor is_imm8_xmm is_imm8_xmm)
17821782
(decl is_simm8 (i8) GprMemImm)
17831783
(extern extractor is_simm8 is_simm8)
1784-
(decl is_rust_simm8 (i8) i32)
1785-
(extern extractor is_rust_simm8 is_rust_simm8)
17861784
(decl is_imm16 (u16) GprMemImm)
17871785
(extern extractor is_imm16 is_imm16)
1788-
(decl is_rust_imm16 (u16) i32)
1789-
(extern extractor is_rust_imm16 is_rust_imm16)
17901786
(decl is_simm16 (i16) GprMemImm)
17911787
(extern extractor is_simm16 is_simm16)
17921788
(decl is_imm32 (u32) GprMemImm)
17931789
(extern extractor is_imm32 is_imm32)
1794-
(decl is_rust_imm32 (u32) i32)
1795-
(extern extractor is_rust_imm32 is_rust_imm32)
17961790
(decl is_simm32 (i32) GprMemImm)
17971791
(extern extractor is_simm32 is_simm32)
17981792
(decl is_gpr (Gpr) GprMemImm)
@@ -2907,12 +2901,12 @@
29072901
;; Helper for creating `imul` instructions with an immediate operand. Match
29082902
;; 8-bit immediates first to allow a smaller instruction encoding.
29092903
(decl x64_imul_imm (Type GprMem i32) Gpr)
2910-
(rule 2 (x64_imul_imm $I16 src1 (is_rust_simm8 src2)) (x64_imulw_rmi_sxb src1 src2))
2911-
(rule 2 (x64_imul_imm $I32 src1 (is_rust_simm8 src2)) (x64_imull_rmi_sxb src1 src2))
2912-
(rule 2 (x64_imul_imm $I64 src1 (is_rust_simm8 src2)) (x64_imulq_rmi_sxb src1 src2))
2913-
(rule 1 (x64_imul_imm $I16 src1 (is_rust_imm16 src2)) (x64_imulw_rmi src1 src2))
2914-
(rule 1 (x64_imul_imm $I32 src1 (is_rust_imm32 src2)) (x64_imull_rmi src1 src2))
2915-
(rule 1 (x64_imul_imm $I64 src1 src2) (x64_imulq_rmi_sxl src1 src2))
2904+
(rule 2 (x64_imul_imm $I16 src1 (i8_try_from_i32 src2)) (x64_imulw_rmi_sxb src1 src2))
2905+
(rule 2 (x64_imul_imm $I32 src1 (i8_try_from_i32 src2)) (x64_imull_rmi_sxb src1 src2))
2906+
(rule 2 (x64_imul_imm $I64 src1 (i8_try_from_i32 src2)) (x64_imulq_rmi_sxb src1 src2))
2907+
(rule 1 (x64_imul_imm $I16 src1 (u16_try_from_i32 src2)) (x64_imulw_rmi src1 src2))
2908+
(rule 1 (x64_imul_imm $I32 src1 (i32_as_u32 src2)) (x64_imull_rmi src1 src2))
2909+
(rule 1 (x64_imul_imm $I64 src1 src2) (x64_imulq_rmi_sxl src1 src2))
29162910

29172911
;; Helper for creating `mul` instructions or `imul` instructions (depending
29182912
;; on `signed`) for 8-bit operands.

cranelift/codegen/src/isa/x64/lower/isle.rs

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1045,21 +1045,13 @@ impl Context for IsleContext<'_, '_, MInst, X64Backend> {
10451045
}
10461046
}
10471047

1048-
fn is_rust_simm8(&mut self, simm32: i32) -> Option<i8> {
1049-
Some(i8::try_from(simm32).ok()?)
1050-
}
1051-
10521048
fn is_imm16(&mut self, src: &GprMemImm) -> Option<u16> {
10531049
match src.clone().to_reg_mem_imm() {
10541050
RegMemImm::Imm { simm32 } => Some(u16::try_from(simm32).ok()?),
10551051
_ => None,
10561052
}
10571053
}
10581054

1059-
fn is_rust_imm16(&mut self, simm32: i32) -> Option<u16> {
1060-
Some(u16::try_from(simm32).ok()?)
1061-
}
1062-
10631055
fn is_simm16(&mut self, src: &GprMemImm) -> Option<i16> {
10641056
match src.clone().to_reg_mem_imm() {
10651057
RegMemImm::Imm { simm32 } => Some(i16::try_from(simm32).ok()?),
@@ -1074,10 +1066,6 @@ impl Context for IsleContext<'_, '_, MInst, X64Backend> {
10741066
}
10751067
}
10761068

1077-
fn is_rust_imm32(&mut self, simm32: i32) -> Option<u32> {
1078-
Some(simm32 as u32)
1079-
}
1080-
10811069
fn is_simm32(&mut self, src: &GprMemImm) -> Option<i32> {
10821070
match src.clone().to_reg_mem_imm() {
10831071
RegMemImm::Imm { simm32 } => Some(simm32 as i32),

cranelift/codegen/src/isle_prelude.rs

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -58,6 +58,11 @@ macro_rules! isle_common_prelude_methods {
5858
x as i64
5959
}
6060

61+
#[inline]
62+
fn i32_as_u32(&mut self, x: i32) -> Option<u32> {
63+
Some(x as u32)
64+
}
65+
6166
#[inline]
6267
fn i32_as_i64(&mut self, x: i32) -> i64 {
6368
x.into()
@@ -933,6 +938,10 @@ macro_rules! isle_common_prelude_methods {
933938
u64::try_from(val).ok()
934939
}
935940

941+
fn u16_try_from_i32(&mut self, val: i32) -> Option<u16> {
942+
u16::try_from(val).ok()
943+
}
944+
936945
fn u16_try_from_u64(&mut self, val: u64) -> Option<u16> {
937946
u16::try_from(val).ok()
938947
}
@@ -941,6 +950,10 @@ macro_rules! isle_common_prelude_methods {
941950
u32::try_from(val).ok()
942951
}
943952

953+
fn i8_try_from_i32(&mut self, val: i32) -> Option<i8> {
954+
i8::try_from(val).ok()
955+
}
956+
944957
fn i8_try_from_u64(&mut self, val: u64) -> Option<i8> {
945958
i8::try_from(val).ok()
946959
}

cranelift/codegen/src/prelude.isle

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -124,6 +124,9 @@
124124
(decl pure partial u8_try_from_i32 (i32) u8)
125125
(extern constructor u8_try_from_i32 u8_try_from_i32)
126126

127+
(decl u16_try_from_i32 (u16) i32)
128+
(extern extractor u16_try_from_i32 u16_try_from_i32)
129+
127130
(decl pure partial u16_try_from_u64 (u64) u16)
128131
(extern constructor u16_try_from_u64 u16_try_from_u64)
129132

@@ -133,6 +136,9 @@
133136
(decl pure partial u64_try_from_i64 (i64) u64)
134137
(extern constructor u64_try_from_i64 u64_try_from_i64)
135138

139+
(decl i8_try_from_i32 (i8) i32)
140+
(extern extractor i8_try_from_i32 i8_try_from_i32)
141+
136142
(decl pure partial i8_try_from_u64 (u64) i8)
137143
(extern constructor i8_try_from_u64 i8_try_from_u64)
138144

@@ -146,6 +152,9 @@
146152
(extern constructor u32_as_u64 u32_as_u64)
147153
(convert u32 u64 u32_as_u64)
148154

155+
(decl i32_as_u32 (u32) i32)
156+
(extern extractor i32_as_u32 i32_as_u32)
157+
149158
(decl pure i32_as_i64 (i32) i64)
150159
(extern constructor i32_as_i64 i32_as_i64)
151160
(convert i32 i64 i32_as_i64)

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