Fix compiler inlining tunables (#11797)

* Fix compiler inlining tunables

Fixes #11784

* fix no-compiler warning

Author: fitzgen

crates/cranelift/src/builder.rs

@@ -102,6 +102,10 @@ impl CompilerBuilder for Builder {
         Ok(())
     }
 
+    fn tunables(&self) -> Option<&Tunables> {
+        self.tunables.as_ref()
+    }
+
     fn build(&self) -> Result<Box<dyn wasmtime_environ::Compiler>> {
         let isa = self.inner.build()?;
         Ok(Box::new(crate::compiler::Compiler::new(

crates/environ/src/compile/mod.rs

@@ -128,6 +128,9 @@ pub trait CompilerBuilder: Send + Sync + fmt::Debug {
     /// Set the tunables for this compiler.
     fn set_tunables(&mut self, tunables: Tunables) -> Result<()>;
 
+    /// Get the tunables used by this compiler.
+    fn tunables(&self) -> Option<&Tunables>;
+
     /// Builds a new [`Compiler`] object from this configuration.
     fn build(&self) -> Result<Box<dyn Compiler>>;
 

crates/wasmtime/src/config.rs

@@ -2396,7 +2396,7 @@ impl Config {
     #[cfg(any(feature = "cranelift", feature = "winch"))]
     pub(crate) fn build_compiler(
         mut self,
-        tunables: &Tunables,
+        tunables: &mut Tunables,
         features: WasmFeatures,
     ) -> Result<(Self, Box<dyn wasmtime_environ::Compiler>)> {
         let target = self.compiler_target();
@@ -2535,6 +2535,7 @@ impl Config {
         for flag in self.compiler_config.flags.iter() {
             compiler.enable(flag)?;
         }
+        *tunables = compiler.tunables().cloned().unwrap();
 
         #[cfg(all(feature = "incremental-cache", feature = "cranelift"))]
         if let Some(cache_store) = &self.compiler_config.cache_store {

crates/wasmtime/src/engine.rs

@@ -96,7 +96,7 @@ impl Engine {
     /// disable these two compiler settings will cause errors.
     pub fn new(config: &Config) -> Result<Engine> {
         let config = config.clone();
-        let (tunables, features) = config.validate()?;
+        let (mut tunables, features) = config.validate()?;
 
         #[cfg(feature = "runtime")]
         if tunables.signals_based_traps {
@@ -113,7 +113,9 @@ impl Engine {
         }
 
         #[cfg(any(feature = "cranelift", feature = "winch"))]
-        let (config, compiler) = config.build_compiler(&tunables, features)?;
+        let (config, compiler) = config.build_compiler(&mut tunables, features)?;
+        #[cfg(not(any(feature = "cranelift", feature = "winch")))]
+        let _ = &mut tunables;
 
         Ok(Engine {
             inner: Arc::new(EngineInner {

crates/winch/src/builder.rs

@@ -72,6 +72,10 @@ impl CompilerBuilder for Builder {
         Ok(())
     }
 
+    fn tunables(&self) -> Option<&Tunables> {
+        self.cranelift.tunables()
+    }
+
     fn build(&self) -> Result<Box<dyn wasmtime_environ::Compiler>> {
         let isa = self.inner.build()?;
         let cranelift = self.cranelift.build()?;

tests/disas/intra-module-inlining.wat

@@ -0,0 +1,52 @@
+;;! target = "x86_64"
+;;! test = "optimize"
+;;! filter = "wasm[0]--function"
+;;! flags = "-C inlining=y -C cranelift-wasmtime_inlining_intra_module=y"
+
+(module
+  (func (result i32)
+    (i32.const 42))
+  (func (result i32)
+    (call 0)))
+
+;; function u0:0(i64 vmctx, i64) -> i32 tail {
+;;     gv0 = vmctx
+;;     gv1 = load.i64 notrap aligned readonly gv0+8
+;;     gv2 = load.i64 notrap aligned gv1+16
+;;     stack_limit = gv2
+;;
+;;                                 block0(v0: i64, v1: i64):
+;; @001b                               jump block1
+;;
+;;                                 block1:
+;; @0019                               v3 = iconst.i32 42
+;; @001b                               return v3  ; v3 = 42
+;; }
+;;
+;; function u0:1(i64 vmctx, i64) -> i32 tail {
+;;     gv0 = vmctx
+;;     gv1 = load.i64 notrap aligned readonly gv0+8
+;;     gv2 = load.i64 notrap aligned gv1+16
+;;     gv3 = vmctx
+;;     gv4 = load.i64 notrap aligned readonly gv3+8
+;;     gv5 = load.i64 notrap aligned gv4+16
+;;     sig0 = (i64 vmctx, i64) -> i32 tail
+;;     fn0 = colocated u0:0 sig0
+;;     stack_limit = gv2
+;;
+;;                                 block0(v0: i64, v1: i64):
+;; @001e                               jump block2
+;;
+;;                                 block2:
+;;                                     jump block3
+;;
+;;                                 block3:
+;;                                     jump block4
+;;
+;;                                 block4:
+;; @0020                               jump block1
+;;
+;;                                 block1:
+;;                                     v6 = iconst.i32 42
+;; @0020                               return v6  ; v6 = 42
+;; }