Skip to content

Commit ebe187a

Browse files
committed
Add a bunch of new instructions from 0x80
1 parent 4d6eb18 commit ebe187a

File tree

3 files changed

+301
-73
lines changed

3 files changed

+301
-73
lines changed

src/cpu.rs

Lines changed: 157 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -217,6 +217,97 @@ impl CPU {
217217
self.clock.cycles += 2;
218218
}
219219

220+
fn add_a_r8(&mut self, register: Register8bit) {
221+
let a = self.registers.as_8bit(&Register8bit::A);
222+
let r8 = self.registers.as_8bit(&register);
223+
let value = a + r8;
224+
self.registers.set(Register8bit::A, value);
225+
self.clock.cycles += 1;
226+
}
227+
228+
fn add_a_hl(&mut self) {
229+
let a = self.registers.as_8bit(&Register8bit::A);
230+
let address = self.registers.as_16bit(&Register16bit::HL);
231+
let data = self.memory.read(address);
232+
let value = a + data;
233+
self.registers.set(Register8bit::A, value);
234+
self.clock.cycles += 1;
235+
}
236+
237+
fn sub_a_r8(&mut self, register: Register8bit) {
238+
let a = self.registers.as_8bit(&Register8bit::A);
239+
let r8 = self.registers.as_8bit(&register);
240+
let value = a - r8;
241+
self.registers.set(Register8bit::A, value);
242+
self.clock.cycles += 1;
243+
}
244+
245+
fn sub_a_hl(&mut self) {
246+
let a = self.registers.as_8bit(&Register8bit::A);
247+
let address = self.registers.as_16bit(&Register16bit::HL);
248+
let data = self.memory.read(address);
249+
let value = a - data;
250+
self.registers.set(Register8bit::A, value);
251+
self.clock.cycles += 1;
252+
}
253+
254+
fn and_a_r8(&mut self, register: Register8bit) {
255+
let a = self.registers.as_8bit(&Register8bit::A);
256+
let data = self.registers.as_8bit(&register);
257+
let value = a & data;
258+
self.registers.set(Register8bit::A, value);
259+
self.registers
260+
.set_flags(Some(value == 0), Some(false), Some(true), Some(false));
261+
self.clock.cycles += 1;
262+
}
263+
264+
fn and_a_hl(&mut self) {
265+
let a = self.registers.as_8bit(&Register8bit::A);
266+
let address = self.registers.as_16bit(&Register16bit::HL);
267+
let data = self.memory.read(address);
268+
let value = a & data;
269+
self.registers.set(Register8bit::A, value);
270+
self.registers
271+
.set_flags(Some(value == 0), Some(false), Some(true), Some(false));
272+
self.clock.cycles += 1;
273+
}
274+
275+
fn or_a_r8(&mut self, register: Register8bit) {
276+
let a = self.registers.as_8bit(&Register8bit::A);
277+
let data = self.registers.as_8bit(&register);
278+
let value = a | data;
279+
self.registers.set(Register8bit::A, value);
280+
self.registers
281+
.set_flags(Some(value == 0), Some(false), Some(false), Some(false));
282+
self.clock.cycles += 1;
283+
}
284+
285+
fn or_a_hl(&mut self) {
286+
let a = self.registers.as_8bit(&Register8bit::A);
287+
let address = self.registers.as_16bit(&Register16bit::HL);
288+
let data = self.memory.read(address);
289+
let value = a | data;
290+
self.registers.set(Register8bit::A, value);
291+
self.clock.cycles += 1;
292+
}
293+
294+
fn xor_a_r8(&mut self, register: Register8bit) {
295+
let a = self.registers.as_8bit(&Register8bit::A);
296+
let data = self.registers.as_8bit(&register);
297+
let value = a ^ data;
298+
self.registers.set(Register8bit::A, value);
299+
self.clock.cycles += 1;
300+
}
301+
302+
fn xor_a_hl(&mut self) {
303+
let a = self.registers.as_8bit(&Register8bit::A);
304+
let address = self.registers.as_16bit(&Register16bit::HL);
305+
let data = self.memory.read(address);
306+
let value = a ^ data;
307+
self.registers.set(Register8bit::A, value);
308+
self.clock.cycles += 1;
309+
}
310+
220311
fn fetch(pc: &mut u16, memory: &Memory) -> u8 {
221312
let data = memory.read(*pc);
222313
*pc += 1;
@@ -228,8 +319,8 @@ impl CPU {
228319
Instruction::NOP => self.clock.cycles += 1,
229320
Instruction::Invalid => todo!(),
230321
Instruction::CB => {
231-
let next_byte = CPU::fetch(&mut self.registers.pc, &self.memory);
232-
self.execute(Instruction::decode_cb(next_byte));
322+
let instruction = CPU::fetch(&mut self.registers.pc, &self.memory);
323+
self.execute(Instruction::decode_cb(instruction));
233324
}
234325
Instruction::LD_A_u8 => self.load_r8_n8(Register8bit::A),
235326
Instruction::LD_B_u8 => self.load_r8_n8(Register8bit::B),
@@ -357,6 +448,70 @@ impl CPU {
357448
Instruction::LD_A_L => self.load_r8_r8(Register8bit::A, Register8bit::L),
358449
Instruction::LD_A_HL => self.load_r8_hl(Register8bit::A),
359450
Instruction::LD_HL_A => self.load_hl_r8(Register8bit::A),
451+
Instruction::ADD_A_A => self.add_a_r8(Register8bit::A),
452+
Instruction::ADD_A_B => self.add_a_r8(Register8bit::B),
453+
Instruction::ADD_A_C => self.add_a_r8(Register8bit::C),
454+
Instruction::ADD_A_D => self.add_a_r8(Register8bit::D),
455+
Instruction::ADD_A_E => self.add_a_r8(Register8bit::E),
456+
Instruction::ADD_A_H => self.add_a_r8(Register8bit::H),
457+
Instruction::ADD_A_L => self.add_a_r8(Register8bit::L),
458+
Instruction::ADD_A_HL => self.add_a_hl(),
459+
Instruction::ADC_A_A => todo!(),
460+
Instruction::ADC_A_B => todo!(),
461+
Instruction::ADC_A_C => todo!(),
462+
Instruction::ADC_A_D => todo!(),
463+
Instruction::ADC_A_E => todo!(),
464+
Instruction::ADC_A_H => todo!(),
465+
Instruction::ADC_A_L => todo!(),
466+
Instruction::ADC_A_HL => todo!(),
467+
Instruction::SUB_A_A => self.sub_a_r8(Register8bit::A),
468+
Instruction::SUB_A_B => self.sub_a_r8(Register8bit::B),
469+
Instruction::SUB_A_C => self.sub_a_r8(Register8bit::C),
470+
Instruction::SUB_A_D => self.sub_a_r8(Register8bit::D),
471+
Instruction::SUB_A_E => self.sub_a_r8(Register8bit::E),
472+
Instruction::SUB_A_H => self.sub_a_r8(Register8bit::H),
473+
Instruction::SUB_A_L => self.sub_a_r8(Register8bit::L),
474+
Instruction::SUB_A_HL => self.sub_a_hl(),
475+
Instruction::SBC_A_A => todo!(),
476+
Instruction::SBC_A_B => todo!(),
477+
Instruction::SBC_A_C => todo!(),
478+
Instruction::SBC_A_D => todo!(),
479+
Instruction::SBC_A_E => todo!(),
480+
Instruction::SBC_A_H => todo!(),
481+
Instruction::SBC_A_L => todo!(),
482+
Instruction::SBC_A_HL => todo!(),
483+
Instruction::AND_A_A => self.and_a_r8(Register8bit::A),
484+
Instruction::AND_A_B => self.and_a_r8(Register8bit::B),
485+
Instruction::AND_A_C => self.and_a_r8(Register8bit::C),
486+
Instruction::AND_A_D => self.and_a_r8(Register8bit::D),
487+
Instruction::AND_A_E => self.and_a_r8(Register8bit::E),
488+
Instruction::AND_A_H => self.and_a_r8(Register8bit::H),
489+
Instruction::AND_A_L => self.and_a_r8(Register8bit::L),
490+
Instruction::AND_A_HL => self.and_a_hl(),
491+
Instruction::XOR_A_A => self.xor_a_r8(Register8bit::A),
492+
Instruction::XOR_A_B => self.xor_a_r8(Register8bit::B),
493+
Instruction::XOR_A_C => self.xor_a_r8(Register8bit::C),
494+
Instruction::XOR_A_D => self.xor_a_r8(Register8bit::D),
495+
Instruction::XOR_A_E => self.xor_a_r8(Register8bit::E),
496+
Instruction::XOR_A_H => self.xor_a_r8(Register8bit::H),
497+
Instruction::XOR_A_L => self.xor_a_r8(Register8bit::L),
498+
Instruction::XOR_A_HL => self.xor_a_hl(),
499+
Instruction::OR_A_A => self.or_a_r8(Register8bit::A),
500+
Instruction::OR_A_B => self.or_a_r8(Register8bit::B),
501+
Instruction::OR_A_C => self.or_a_r8(Register8bit::C),
502+
Instruction::OR_A_D => self.or_a_r8(Register8bit::D),
503+
Instruction::OR_A_E => self.or_a_r8(Register8bit::E),
504+
Instruction::OR_A_H => self.or_a_r8(Register8bit::H),
505+
Instruction::OR_A_L => self.or_a_r8(Register8bit::L),
506+
Instruction::OR_A_HL => self.or_a_hl(),
507+
Instruction::CP_A_A => todo!(),
508+
Instruction::CP_A_B => todo!(),
509+
Instruction::CP_A_C => todo!(),
510+
Instruction::CP_A_D => todo!(),
511+
Instruction::CP_A_E => todo!(),
512+
Instruction::CP_A_H => todo!(),
513+
Instruction::CP_A_L => todo!(),
514+
Instruction::CP_A_HL => todo!(),
360515
}
361516
}
362517
}

0 commit comments

Comments
 (0)