-
Notifications
You must be signed in to change notification settings - Fork 0
Expand file tree
/
Copy pathM4ToVGA_top.bsf
More file actions
205 lines (205 loc) · 6.75 KB
/
M4ToVGA_top.bsf
File metadata and controls
205 lines (205 loc) · 6.75 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 2020 Intel Corporation. All rights reserved.
Your use of Intel Corporation's design tools, logic functions
and other software and tools, and any partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Intel Program License
Subscription Agreement, the Intel Quartus Prime License Agreement,
the Intel FPGA IP License Agreement, or other applicable license
agreement, including, without limitation, that your use is for
the sole purpose of programming logic devices manufactured by
Intel and sold by Intel or its authorized distributors. Please
refer to the applicable agreement for further details, at
https://fpgasoftware.intel.com/eula.
*/
(header "symbol" (version "1.2"))
(symbol
(rect 16 16 280 400)
(text "M4ToVGA_top" (rect 5 0 92 19)(font "Intel Clear" (font_size 8)))
(text "inst" (rect 8 363 24 380)(font "Intel Clear" ))
(port
(pt 0 32)
(input)
(text "external_clock" (rect 0 0 83 19)(font "Intel Clear" (font_size 8)))
(text "external_clock" (rect 21 27 104 46)(font "Intel Clear" (font_size 8)))
(line (pt 0 32)(pt 16 32))
)
(port
(pt 0 48)
(input)
(text "m4_hsync" (rect 0 0 60 19)(font "Intel Clear" (font_size 8)))
(text "m4_hsync" (rect 21 43 81 62)(font "Intel Clear" (font_size 8)))
(line (pt 0 48)(pt 16 48))
)
(port
(pt 0 64)
(input)
(text "m4_vsync" (rect 0 0 60 19)(font "Intel Clear" (font_size 8)))
(text "m4_vsync" (rect 21 59 81 78)(font "Intel Clear" (font_size 8)))
(line (pt 0 64)(pt 16 64))
)
(port
(pt 0 80)
(input)
(text "m4_video" (rect 0 0 60 19)(font "Intel Clear" (font_size 8)))
(text "m4_video" (rect 21 75 81 94)(font "Intel Clear" (font_size 8)))
(line (pt 0 80)(pt 16 80))
)
(port
(pt 0 96)
(input)
(text "m4_dotclk" (rect 0 0 63 19)(font "Intel Clear" (font_size 8)))
(text "m4_dotclk" (rect 21 91 84 110)(font "Intel Clear" (font_size 8)))
(line (pt 0 96)(pt 16 96))
)
(port
(pt 264 32)
(output)
(text "VGA_CLKOUT_PIN76" (rect 0 0 128 19)(font "Intel Clear" (font_size 8)))
(text "VGA_CLKOUT_PIN76" (rect 115 27 243 46)(font "Intel Clear" (font_size 8)))
(line (pt 264 32)(pt 248 32))
)
(port
(pt 264 48)
(output)
(text "vr[1]" (rect 0 0 29 19)(font "Intel Clear" (font_size 8)))
(text "vr[1]" (rect 214 43 243 62)(font "Intel Clear" (font_size 8)))
(line (pt 264 48)(pt 248 48))
)
(port
(pt 264 64)
(output)
(text "vr[0]" (rect 0 0 29 19)(font "Intel Clear" (font_size 8)))
(text "vr[0]" (rect 214 59 243 78)(font "Intel Clear" (font_size 8)))
(line (pt 264 64)(pt 248 64))
)
(port
(pt 264 80)
(output)
(text "vg[1]" (rect 0 0 31 19)(font "Intel Clear" (font_size 8)))
(text "vg[1]" (rect 212 75 243 94)(font "Intel Clear" (font_size 8)))
(line (pt 264 80)(pt 248 80))
)
(port
(pt 264 96)
(output)
(text "vg[0]" (rect 0 0 31 19)(font "Intel Clear" (font_size 8)))
(text "vg[0]" (rect 212 91 243 110)(font "Intel Clear" (font_size 8)))
(line (pt 264 96)(pt 248 96))
)
(port
(pt 264 112)
(output)
(text "vb[1]" (rect 0 0 33 19)(font "Intel Clear" (font_size 8)))
(text "vb[1]" (rect 210 107 243 126)(font "Intel Clear" (font_size 8)))
(line (pt 264 112)(pt 248 112))
)
(port
(pt 264 128)
(output)
(text "vb[0]" (rect 0 0 33 19)(font "Intel Clear" (font_size 8)))
(text "vb[0]" (rect 210 123 243 142)(font "Intel Clear" (font_size 8)))
(line (pt 264 128)(pt 248 128))
)
(port
(pt 264 144)
(output)
(text "vga_vsync" (rect 0 0 61 19)(font "Intel Clear" (font_size 8)))
(text "vga_vsync" (rect 182 139 243 158)(font "Intel Clear" (font_size 8)))
(line (pt 264 144)(pt 248 144))
)
(port
(pt 264 160)
(output)
(text "vga_hsync" (rect 0 0 61 19)(font "Intel Clear" (font_size 8)))
(text "vga_hsync" (rect 182 155 243 174)(font "Intel Clear" (font_size 8)))
(line (pt 264 160)(pt 248 160))
)
(port
(pt 264 176)
(output)
(text "FB_DATAOUT_PIN74" (rect 0 0 128 19)(font "Intel Clear" (font_size 8)))
(text "FB_DATAOUT_PIN74" (rect 115 171 243 190)(font "Intel Clear" (font_size 8)))
(line (pt 264 176)(pt 248 176))
)
(port
(pt 264 192)
(output)
(text "DOTCLKP2_PIN64" (rect 0 0 112 19)(font "Intel Clear" (font_size 8)))
(text "DOTCLKP2_PIN64" (rect 131 187 243 206)(font "Intel Clear" (font_size 8)))
(line (pt 264 192)(pt 248 192))
)
(port
(pt 264 208)
(output)
(text "LEDS0" (rect 0 0 40 19)(font "Intel Clear" (font_size 8)))
(text "LEDS0" (rect 203 203 243 222)(font "Intel Clear" (font_size 8)))
(line (pt 264 208)(pt 248 208))
)
(port
(pt 264 224)
(output)
(text "LEDS1" (rect 0 0 40 19)(font "Intel Clear" (font_size 8)))
(text "LEDS1" (rect 203 219 243 238)(font "Intel Clear" (font_size 8)))
(line (pt 264 224)(pt 248 224))
)
(port
(pt 264 240)
(output)
(text "LEDS2" (rect 0 0 40 19)(font "Intel Clear" (font_size 8)))
(text "LEDS2" (rect 203 235 243 254)(font "Intel Clear" (font_size 8)))
(line (pt 264 240)(pt 248 240))
)
(port
(pt 264 256)
(output)
(text "LEDS3" (rect 0 0 40 19)(font "Intel Clear" (font_size 8)))
(text "LEDS3" (rect 203 251 243 270)(font "Intel Clear" (font_size 8)))
(line (pt 264 256)(pt 248 256))
)
(port
(pt 264 272)
(output)
(text "PIXSTATE_PIN59" (rect 0 0 105 19)(font "Intel Clear" (font_size 8)))
(text "PIXSTATE_PIN59" (rect 138 267 243 286)(font "Intel Clear" (font_size 8)))
(line (pt 264 272)(pt 248 272))
)
(port
(pt 264 288)
(output)
(text "WADDR0_PIN66" (rect 0 0 100 19)(font "Intel Clear" (font_size 8)))
(text "WADDR0_PIN66" (rect 143 283 243 302)(font "Intel Clear" (font_size 8)))
(line (pt 264 288)(pt 248 288))
)
(port
(pt 264 304)
(output)
(text "WADDR1_PIN68" (rect 0 0 100 19)(font "Intel Clear" (font_size 8)))
(text "WADDR1_PIN68" (rect 143 299 243 318)(font "Intel Clear" (font_size 8)))
(line (pt 264 304)(pt 248 304))
)
(port
(pt 264 320)
(output)
(text "WADDR2_PIN70" (rect 0 0 100 19)(font "Intel Clear" (font_size 8)))
(text "WADDR2_PIN70" (rect 143 315 243 334)(font "Intel Clear" (font_size 8)))
(line (pt 264 320)(pt 248 320))
)
(port
(pt 264 336)
(output)
(text "WADDR3_PIN72" (rect 0 0 100 19)(font "Intel Clear" (font_size 8)))
(text "WADDR3_PIN72" (rect 143 331 243 350)(font "Intel Clear" (font_size 8)))
(line (pt 264 336)(pt 248 336))
)
(drawing
(rectangle (rect 16 16 248 368))
)
)