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added code to allow left / right shift in 800 pixel mode via dip switch
1 parent e65ea23 commit 9e477fd

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3 files changed

+8860
-7809
lines changed

3 files changed

+8860
-7809
lines changed

m4_input.sv

Lines changed: 29 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -44,6 +44,7 @@ module m4_input (
4444
reg [9:0] INCounterY;
4545
reg [23:0] ledsreg;
4646
reg [31:0] calc;
47+
reg [9:0] offsetc;
4748
reg dot_r;
4849
reg dot_r2;
4950
reg hsync_r;
@@ -52,6 +53,7 @@ module m4_input (
5253
reg vsync_r2;
5354
reg h0_r,h1_r,h2_r,h3_r,h4_r,h5_r;
5455
reg h0_r2,h1_r2,h2_r2,h3_r2,h4_r2,h5_r2;
56+
reg [5:0] hvalue;
5557
reg [31:0] nextline_r;
5658
reg [31:0] nextline_r2;
5759
reg [31:0] oldlinectr;
@@ -93,6 +95,7 @@ begin
9395
outputLEDA <= 0; // LED A indicator (10 bits)
9496
outputLEDB <= 0; // LED B indicator (10 bits)
9597
screenMode <= SIXTYFOURCOLMODE; // screen mode
98+
offsetc <= 0;
9699
end
97100

98101

@@ -117,6 +120,22 @@ begin
117120
h3_r2 <= h3_r;
118121
h4_r2 <= h4_r;
119122
h5_r2 <= h5_r;
123+
124+
hvalue[5] <= h5_r2;
125+
hvalue[4] <= h4_r2;
126+
hvalue[3] <= h3_r2;
127+
hvalue[2] <= h2_r2;
128+
hvalue[1] <= h1_r2;
129+
hvalue[0] <= h0_r2;
130+
131+
if(hvalue >=32)
132+
begin
133+
offsetc = (hvalue - 32) << 2;
134+
end
135+
else
136+
begin
137+
offsetc = (32 - hvalue) << 2;
138+
end
120139
end
121140

122141

@@ -144,13 +163,7 @@ begin
144163
state_reg = NORMAL;
145164
end
146165

147-
//outputLEDA = TRUNC9'(memCtr); // put memCtr in LED A indicator (normally 0)
148-
outputLEDA[0] = h0_r2;
149-
outputLEDA[1] = h1_r2;
150-
outputLEDA[2] = h2_r2;
151-
outputLEDA[3] = h3_r2;
152-
outputLEDA[4] = h4_r2;
153-
outputLEDA[5] = h5_r2;
166+
outputLEDA = hvalue;
154167

155168
// this code turns on MEMCLEAR mode when we are switching between 64 and 80 column modes
156169
if(highestDotCount > 320) // ignore weird glitchy stuff
@@ -214,11 +227,18 @@ always @(posedge dotclk, posedge video)
214227
// if we're on the same line as last dot clock, calculate the address for the next pixel,
215228
// put it into the write address of the dual port ram, increment INCounterX for the next
216229
// pixel, and reset the dot_r2 video register back to black
217-
begin
230+
begin
218231
if(highestDotCount < 720) // appears that it's 639 and 799 technically (80 column mode vs 64 column mode)
219232
calc = (800*INCounterY) + INCounterX + 16; // 64 column mode shifting
220233
else
221-
calc = (800*(INCounterY-8)) + INCounterX - 71; // 80 column mode shifting
234+
if(hvalue >= 32)
235+
begin
236+
calc = (800*(INCounterY-8)) + INCounterX + offsetc; // 80 column mode shifting
237+
end
238+
else
239+
begin
240+
calc = (800*(INCounterY-8)) + INCounterX - offsetc; // 80 column mode shifting
241+
end
222242

223243
waddr[17:0] = TRUNC'(calc); // set write address in dual port ram
224244
INCounterX = INCounterX + 1'b1; // increment X counter

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