Add Systolic Arrays

[rachitnigam]

We should add the largest systolic array that we can push through the synthesis flow as a part of this test suite. @calebmkim might already know the answer: what is the largest systolic array that meets timing?

[calebmkim]

32x32 barely meets timing for matrix multiplication (I didn't try the different post-ops: those may or may not meet timing at 32x32).

[rachitnigam]

Okay, do you have the timing reports for that somewhere? I think we should:

1. Pinpoint what is the bottleneck exactly
2. Do a short literature search and see what are the largest systolic arrays people have been able to fit onto an FPGA. Maybe the PolySA paper would be a good place to look for this

I want to propose area optimization as a key theme for 2024 (https://github.com/orgs/calyxir/discussions/1825) and so I think we should pick a particular set of targets, like being able to synthesize a 128x128 SA, and see how far we can get with it.