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Refactor type usage for immediate values and enhance switch handling in M68K disassembler
- Replace int with uint32_t for immediate values, register lists, and related parameters to ensure correct type handling and consistency. - Add default cases to switch statements for improved robustness. - Update bitfield printing to use explicit PRId8 formatting for clarity. - Refactor detail handling in M68KInstPrinter to use helper functions for detail access. - Minor code cleanups and improved type safety throughout disassembler logic.
1 parent cf03858 commit 168c1d7

2 files changed

Lines changed: 74 additions & 60 deletions

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‎arch/M68K/M68KDisassembler.c‎

Lines changed: 68 additions & 53 deletions
Original file line numberDiff line numberDiff line change
@@ -55,9 +55,9 @@ enum {
5555
M68K_CPU_TYPE_68EC020,
5656
M68K_CPU_TYPE_68020,
5757
M68K_CPU_TYPE_CPU32,
58-
M68K_CPU_TYPE_68030, /* Supported by disassembler ONLY */
59-
M68K_CPU_TYPE_68040, /* Supported by disassembler ONLY */
60-
M68K_CPU_TYPE_68060 /* Supported by disassembler ONLY */
58+
M68K_CPU_TYPE_68030,
59+
M68K_CPU_TYPE_68040,
60+
M68K_CPU_TYPE_68060
6161
};
6262

6363
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -141,7 +141,7 @@ static void d68030_pmmu(m68k_info *info);
141141
static void d68040_pflush(m68k_info *info);
142142
static void d68040_ptest(m68k_info *info);
143143
static void d68040_cpush(m68k_info *info);
144-
static int instruction_is_valid(m68k_info *info, const unsigned int word_check);
144+
static int instruction_is_valid(m68k_info *info, uint32_t word_check);
145145

146146
typedef struct {
147147
void (*instruction)(m68k_info *info); /* handler function */
@@ -352,7 +352,7 @@ static void get_with_index_address_mode(m68k_info *info, cs_m68k_op *op,
352352
}
353353

354354
op->mem.disp = (int8_t)(extension & 0xff);
355-
op->mem.disp += pc_adjust;
355+
op->mem.disp += (int16_t)pc_adjust;
356356
op->mem.disp_size = 0;
357357

358358
if (EXT_INDEX_SCALE(extension)) {
@@ -629,7 +629,8 @@ static void build_r(m68k_info *info, int opcode, uint8_t size)
629629
op1->reg = M68K_REG_D0 + (info->ir & 7);
630630
}
631631

632-
static void build_imm_ea(m68k_info *info, int opcode, uint8_t size, int imm)
632+
static void build_imm_ea(m68k_info *info, int opcode, uint8_t size,
633+
uint32_t imm)
633634
{
634635
cs_m68k_op *op0;
635636
cs_m68k_op *op1;
@@ -640,7 +641,7 @@ static void build_imm_ea(m68k_info *info, int opcode, uint8_t size, int imm)
640641

641642
op0->type = M68K_OP_IMM;
642643
op0->address_mode = M68K_AM_IMMEDIATE;
643-
op0->imm = (unsigned int)imm;
644+
op0->imm = imm;
644645

645646
get_ea_mode_op(info, op1, info->ir, size);
646647
}
@@ -749,7 +750,7 @@ static void build_pi_pi(m68k_info *info, int opcode, int size)
749750
op1->reg = M68K_REG_A0 + ((info->ir >> 9) & 7);
750751
}
751752

752-
static void build_imm_special_reg(m68k_info *info, int opcode, int imm,
753+
static void build_imm_special_reg(m68k_info *info, int opcode, uint32_t imm,
753754
int size, m68k_reg reg)
754755
{
755756
cs_m68k_op *op0;
@@ -761,7 +762,7 @@ static void build_imm_special_reg(m68k_info *info, int opcode, int imm,
761762

762763
op0->type = M68K_OP_IMM;
763764
op0->address_mode = M68K_AM_IMMEDIATE;
764-
op0->imm = (unsigned int)imm;
765+
op0->imm = imm;
765766

766767
op1->address_mode = M68K_AM_NONE;
767768
op1->reg = reg;
@@ -967,7 +968,7 @@ static void build_movem_er(m68k_info *info, int opcode, int size)
967968
get_ea_mode_op(info, op0, info->ir, size);
968969
}
969970

970-
static void build_imm(m68k_info *info, int opcode, int data)
971+
static void build_imm(m68k_info *info, int opcode, uint32_t data)
971972
{
972973
cs_m68k_op *op;
973974
cs_m68k *ext = build_init_op(info, opcode, 1, 0);
@@ -981,12 +982,12 @@ static void build_imm(m68k_info *info, int opcode, int data)
981982
op->imm = data;
982983
}
983984

984-
static void build_illegal(m68k_info *info, int data)
985+
static void build_illegal(m68k_info *info, uint32_t data)
985986
{
986987
build_imm(info, M68K_INS_ILLEGAL, data);
987988
}
988989

989-
static void build_invalid(m68k_info *info, int data)
990+
static void build_invalid(m68k_info *info, uint32_t data)
990991
{
991992
build_imm(info, M68K_INS_INVALID, data);
992993
}
@@ -999,7 +1000,7 @@ static void build_cas2(m68k_info *info, int size)
9991000
cs_m68k_op *op1;
10001001
cs_m68k_op *op2;
10011002
cs_m68k *ext = build_init_op(info, M68K_INS_CAS2, 3, size);
1002-
int reg_0, reg_1;
1003+
uint32_t reg_0, reg_1;
10031004

10041005
/* cas2 is the only 3 words instruction, word2 and word3 have the same motif bits to check */
10051006
word3 = peek_imm_32(info) & 0xffff;
@@ -1055,15 +1056,16 @@ static void build_chk2_cmp2(m68k_info *info, int size)
10551056
((extension >> 12) & 7);
10561057
}
10571058

1058-
static void build_move16(m68k_info *info, int data[2], int modes[2])
1059+
static void build_move16(m68k_info *info, const uint32_t data[2],
1060+
const uint32_t modes[2])
10591061
{
10601062
cs_m68k *ext = build_init_op(info, M68K_INS_MOVE16, 2, 0);
10611063
int i;
10621064

10631065
for (i = 0; i < 2; ++i) {
10641066
cs_m68k_op *op = &ext->operands[i];
1065-
const int d = data[i];
1066-
const int m = modes[i];
1067+
const uint32_t d = data[i];
1068+
const uint32_t m = modes[i];
10671069

10681070
op->type = M68K_OP_MEM;
10691071

@@ -1115,6 +1117,8 @@ static void build_cpush_cinv(m68k_info *info, int op_offset)
11151117
ext->op_count = 1;
11161118
MCInst_setOpcode(info->inst, op_offset + 2);
11171119
break;
1120+
default:
1121+
return;
11181122
}
11191123

11201124
op0 = &ext->operands[0];
@@ -2007,6 +2011,8 @@ static void fmovem(m68k_info *info, uint32_t extension)
20072011
op_reglist->register_bits = ((uint32_t)reverse_bits_8(reglist))
20082012
<< 16;
20092013
break;
2014+
default:
2015+
break;
20102016
}
20112017
}
20122018

@@ -2037,13 +2043,11 @@ static void d68020_cpgen(m68k_info *info)
20372043
* word) must be rejected on pre-68040 CPUs. Only guard general FPU
20382044
* operations (type 0-1); fmove_fpcr/fmovem types are dispatched
20392045
* separately and never reach the SD path. */
2040-
{
2041-
uint32_t peeked = peek_imm_16(info);
2042-
if (M68K_FEXT_TYPE(peeked) <= 1 && M68K_FEXT_SD_FLAG(peeked) &&
2043-
!(info->type & M68040_PLUS)) {
2044-
d68000_invalid(info);
2045-
return;
2046-
}
2046+
uint32_t peeked = peek_imm_16(info);
2047+
if (M68K_FEXT_TYPE(peeked) <= 1 && M68K_FEXT_SD_FLAG(peeked) &&
2048+
!(info->type & M68040_PLUS)) {
2049+
d68000_invalid(info);
2050+
return;
20472051
}
20482052

20492053
next = read_imm_16(info);
@@ -2078,6 +2082,8 @@ static void d68020_cpgen(m68k_info *info)
20782082
case 0x7:
20792083
fmovem(info, next);
20802084
return;
2085+
default:
2086+
break;
20812087
}
20822088

20832089
if (M68K_FEXT_SD_FLAG(next)) {
@@ -2853,6 +2859,8 @@ static void d68010_movec(m68k_info *info)
28532859
case 0x807:
28542860
reg = M68K_REG_SRP;
28552861
break;
2862+
default:
2863+
break;
28562864
}
28572865

28582866
if (BIT_0(info->ir)) {
@@ -2959,9 +2967,9 @@ static void d68000_moveq(m68k_info *info)
29592967

29602968
static void d68040_move16_pi_pi(m68k_info *info)
29612969
{
2962-
int data[] = { info->ir & 7, (read_imm_16(info) >> 12) & 7 };
2963-
int modes[] = { M68K_AM_REGI_ADDR_POST_INC,
2964-
M68K_AM_REGI_ADDR_POST_INC };
2970+
uint32_t data[] = { info->ir & 7, (read_imm_16(info) >> 12) & 7 };
2971+
uint32_t modes[] = { M68K_AM_REGI_ADDR_POST_INC,
2972+
M68K_AM_REGI_ADDR_POST_INC };
29652973

29662974
LIMIT_CPU_TYPES(info, M68040_PLUS);
29672975

@@ -2970,9 +2978,9 @@ static void d68040_move16_pi_pi(m68k_info *info)
29702978

29712979
static void d68040_move16_pi_al(m68k_info *info)
29722980
{
2973-
int data[2];
2974-
int modes[] = { M68K_AM_REGI_ADDR_POST_INC,
2975-
M68K_AM_ABSOLUTE_DATA_LONG };
2981+
uint32_t data[2];
2982+
uint32_t modes[] = { M68K_AM_REGI_ADDR_POST_INC,
2983+
M68K_AM_ABSOLUTE_DATA_LONG };
29762984

29772985
LIMIT_CPU_TYPES(info, M68040_PLUS);
29782986

@@ -2983,9 +2991,9 @@ static void d68040_move16_pi_al(m68k_info *info)
29832991

29842992
static void d68040_move16_al_pi(m68k_info *info)
29852993
{
2986-
int data[2];
2987-
int modes[] = { M68K_AM_ABSOLUTE_DATA_LONG,
2988-
M68K_AM_REGI_ADDR_POST_INC };
2994+
uint32_t data[2];
2995+
uint32_t modes[] = { M68K_AM_ABSOLUTE_DATA_LONG,
2996+
M68K_AM_REGI_ADDR_POST_INC };
29892997

29902998
LIMIT_CPU_TYPES(info, M68040_PLUS);
29912999

@@ -2996,8 +3004,9 @@ static void d68040_move16_al_pi(m68k_info *info)
29963004

29973005
static void d68040_move16_ai_al(m68k_info *info)
29983006
{
2999-
int data[2];
3000-
int modes[] = { M68K_AM_REG_DIRECT_ADDR, M68K_AM_ABSOLUTE_DATA_LONG };
3007+
uint32_t data[2];
3008+
uint32_t modes[] = { M68K_AM_REG_DIRECT_ADDR,
3009+
M68K_AM_ABSOLUTE_DATA_LONG };
30013010

30023011
LIMIT_CPU_TYPES(info, M68040_PLUS);
30033012

@@ -3008,8 +3017,9 @@ static void d68040_move16_ai_al(m68k_info *info)
30083017

30093018
static void d68040_move16_al_ai(m68k_info *info)
30103019
{
3011-
int data[2];
3012-
int modes[] = { M68K_AM_ABSOLUTE_DATA_LONG, M68K_AM_REG_DIRECT_ADDR };
3020+
uint32_t data[2];
3021+
uint32_t modes[] = { M68K_AM_ABSOLUTE_DATA_LONG,
3022+
M68K_AM_REG_DIRECT_ADDR };
30133023

30143024
LIMIT_CPU_TYPES(info, M68040_PLUS);
30153025

@@ -3450,6 +3460,8 @@ static void d68040_pflush(m68k_info *info)
34503460
case 3: /* PFLUSHA */
34513461
build_init_op(info, M68K_INS_PFLUSHA, 0, 0);
34523462
break;
3463+
default:
3464+
break;
34533465
}
34543466
}
34553467

@@ -4121,7 +4133,7 @@ static void d68020_unpk_mm(m68k_info *info)
41214133
/* This table is auto-generated. Look in contrib/m68k_instruction_tbl_gen for more info */
41224134
#include "M68KInstructionTable.inc"
41234135

4124-
static int instruction_is_valid(m68k_info *info, const unsigned int word_check)
4136+
static int instruction_is_valid(m68k_info *info, const uint32_t word_check)
41254137
{
41264138
const unsigned int instruction = info->ir;
41274139
const instruction_struct *i = &g_instruction_table[instruction];
@@ -4136,7 +4148,7 @@ static int instruction_is_valid(m68k_info *info, const unsigned int word_check)
41364148
return 1;
41374149
}
41384150

4139-
static int exists_reg_list(uint16_t *regs, uint8_t count, m68k_reg reg)
4151+
static int exists_reg_list(const uint16_t *regs, uint8_t count, m68k_reg reg)
41404152
{
41414153
uint8_t i;
41424154

@@ -4245,6 +4257,8 @@ static void update_op_reg_list(m68k_info *info, cs_m68k_op *op, int write)
42454257
add_reg_to_rw_list(info, op->reg_pair.reg_0, write);
42464258
add_reg_to_rw_list(info, op->reg_pair.reg_1, write);
42474259
break;
4260+
default:
4261+
break;
42484262
}
42494263
}
42504264

@@ -4268,8 +4282,8 @@ static void build_regs_read_write_counts(m68k_info *info)
42684282
}
42694283
}
42704284

4271-
static void m68k_setup_internals(m68k_info *info, MCInst *inst, unsigned int pc,
4272-
unsigned int cpu_type)
4285+
static void m68k_setup_internals(m68k_info *info, MCInst *inst, uint32_t pc,
4286+
uint32_t cpu_type)
42734287
{
42744288
info->inst = inst;
42754289
info->pc = pc;
@@ -4355,8 +4369,8 @@ bool M68K_getInstruction(csh ud, const uint8_t *code, size_t code_len,
43554369
#ifdef M68K_DEBUG
43564370
SStream ss;
43574371
#endif
4358-
int s;
4359-
int cpu_type = M68K_CPU_TYPE_68000;
4372+
uint32_t sz = 0;
4373+
uint32_t cpu_type = M68K_CPU_TYPE_68000;
43604374
cs_struct *handle = instr->csh;
43614375
m68k_info *info = (m68k_info *)handle->printer_info;
43624376

@@ -4379,23 +4393,24 @@ bool M68K_getInstruction(csh ud, const uint8_t *code, size_t code_len,
43794393
info->code_len = code_len;
43804394
info->baseAddress = address;
43814395

4382-
if (handle->mode & CS_MODE_M68K_010)
4396+
if (handle->mode & CS_MODE_M68K_010) {
43834397
cpu_type = M68K_CPU_TYPE_68010;
4384-
if (handle->mode & CS_MODE_M68K_020)
4398+
} else if (handle->mode & CS_MODE_M68K_020) {
43854399
cpu_type = M68K_CPU_TYPE_68020;
4386-
if (handle->mode & CS_MODE_M68K_030)
4400+
} else if (handle->mode & CS_MODE_M68K_030) {
43874401
cpu_type = M68K_CPU_TYPE_68030;
4388-
if (handle->mode & CS_MODE_M68K_040)
4402+
} else if (handle->mode & CS_MODE_M68K_040) {
43894403
cpu_type = M68K_CPU_TYPE_68040;
4390-
if (handle->mode & CS_MODE_M68K_060)
4404+
} else if (handle->mode & CS_MODE_M68K_060) {
43914405
cpu_type = M68K_CPU_TYPE_68060;
4392-
if (handle->mode & CS_MODE_M68K_CPU32)
4406+
} else if (handle->mode & CS_MODE_M68K_CPU32) {
43934407
cpu_type = M68K_CPU_TYPE_CPU32;
4408+
}
43944409

4395-
m68k_setup_internals(info, instr, (unsigned int)address, cpu_type);
4396-
s = m68k_disassemble(info, address);
4410+
m68k_setup_internals(info, instr, (uint32_t)address, cpu_type);
4411+
sz = m68k_disassemble(info, address);
43974412

4398-
if (s == 0) {
4413+
if (sz == 0) {
43994414
*size = 2;
44004415
return false;
44014416
}
@@ -4408,10 +4423,10 @@ bool M68K_getInstruction(csh ud, const uint8_t *code, size_t code_len,
44084423
#endif
44094424

44104425
// Make sure we always stay within range
4411-
if (s > (int)code_len)
4426+
if (sz > (uint32_t)code_len)
44124427
*size = (uint16_t)code_len;
44134428
else
4414-
*size = (uint16_t)s;
4429+
*size = sz;
44154430

44164431
return true;
44174432
}

‎arch/M68K/M68KInstPrinter.c‎

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -172,14 +172,14 @@ static void printBitfield(SStream *O, const cs_m68k_op *op)
172172
return;
173173
SStream_concat0(O, "{");
174174
if (M68K_BF_IS_REG(op->mem.offset))
175-
SStream_concat(O, "d%d", M68K_BF_REG_NUM(op->mem.offset));
175+
SStream_concat(O, "d%" PRId8, M68K_BF_REG_NUM(op->mem.offset));
176176
else
177-
SStream_concat(O, "%d", op->mem.offset);
177+
SStream_concat(O, "%" PRId8, op->mem.offset);
178178
SStream_concat0(O, ":");
179179
if (M68K_BF_IS_REG(op->mem.width))
180-
SStream_concat(O, "d%d", M68K_BF_REG_NUM(op->mem.width));
180+
SStream_concat(O, "d%" PRId8, M68K_BF_REG_NUM(op->mem.width));
181181
else
182-
SStream_concat(O, "%d", op->mem.width);
182+
SStream_concat(O, "%" PRId8, op->mem.width);
183183
SStream_concat0(O, "}");
184184
}
185185

@@ -468,8 +468,8 @@ void M68K_printInst(MCInst *MI, SStream *O, void *PrinterInfo)
468468
cs_detail *detail = NULL;
469469
int i = 0;
470470

471-
detail = MI->flat_insn->detail;
472-
if (detail) {
471+
if (detail_is_set(MI)) {
472+
detail = get_detail(MI);
473473
int regs_read_count = MIN((int)ARR_SIZE(detail->regs_read),
474474
info->regs_read_count);
475475
int regs_write_count = MIN((int)ARR_SIZE(detail->regs_write),
@@ -478,7 +478,6 @@ void M68K_printInst(MCInst *MI, SStream *O, void *PrinterInfo)
478478
MIN((int)ARR_SIZE(detail->groups), info->groups_count);
479479

480480
memcpy(&detail->m68k, ext, sizeof(cs_m68k));
481-
482481
memcpy(&detail->regs_read, &info->regs_read,
483482
regs_read_count * sizeof(info->regs_read[0]));
484483
detail->regs_read_count = regs_read_count;

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