Skip to content

Commit 240722a

Browse files
moste00moste00
committed
minor documentation wording and fixes to the default details policy
1 parent 45c3288 commit 240722a

5 files changed

Lines changed: 30 additions & 31 deletions

File tree

‎Mapping.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -414,8 +414,7 @@ bool map_use_alias_details(const MCInst *MI)
414414
{
415415
assert(MI);
416416
return (MI->csh->detail_opt & CS_OPT_ON) &&
417-
!(MI->csh->detail_opt & CS_OPT_DETAIL_REAL) &&
418-
!(MI->csh->detail_opt & CS_OPT_DETAIL_UNCOMPRESSED_REAL);
417+
!(MI->csh->detail_opt & CS_OPT_DETAIL_REAL);
419418
}
420419

421420
/// Sets the setDetailOps flag to @p Val.

‎arch/RISCV/RISCVInstPrinter.c‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -87,19 +87,20 @@ static bool isAliasSyntax(const MCInst *MI)
8787

8888
static bool isRealDetail(const MCInst *MI)
8989
{
90-
return MI->csh->detail_opt & CS_OPT_DETAIL_REAL;
90+
return detail_is_set(MI) && (MI->csh->detail_opt & CS_OPT_DETAIL_REAL);
9191
}
9292

9393
static bool isUncompressedRealDetail(const MCInst *MI)
9494
{
9595
return detail_is_set(MI) &&
96-
!(MI->csh->detail_opt &
97-
(CS_OPT_DETAIL_REAL | CS_OPT_DETAIL_ALIAS));
96+
(MI->csh->detail_opt & CS_OPT_DETAIL_UNCOMPRESSED_REAL);
9897
}
9998

10099
static bool isAliasDetail(const MCInst *MI)
101100
{
102-
return MI->csh->detail_opt & CS_OPT_DETAIL_ALIAS;
101+
return detail_is_set(MI) &&
102+
!(MI->csh->detail_opt &
103+
(CS_OPT_DETAIL_REAL | CS_OPT_DETAIL_UNCOMPRESSED_REAL));
103104
}
104105

105106
const char *doGetRegisterName(MCRegister Reg)

‎cstool/cstool.c‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -730,7 +730,7 @@ static void usage(char *prog)
730730

731731
printf("\nExtra options:\n");
732732
printf(" -d show detailed information of the instructions\n");
733-
printf(" -r show detailed information of the uncompressed real instructions when possible\n");
733+
printf(" -r show detailed information of the real instructions (even for aliases)\n");
734734
printf(" -a Print Capstone register alias (if any). Otherwise LLVM register names are emitted.\n");
735735
printf(" -s decode in SKIPDATA mode\n");
736736
printf(" -u show immediates as unsigned\n");
@@ -952,7 +952,6 @@ int main(int argc, char **argv)
952952
break;
953953
case 'r':
954954
set_real_detail = true;
955-
detail_flag = true;
956955
break;
957956
case 's':
958957
skipdata = true;
@@ -1165,7 +1164,7 @@ int main(int argc, char **argv)
11651164

11661165
if (set_real_detail) {
11671166
cs_option(handle, CS_OPT_DETAIL,
1168-
(CS_OPT_DETAIL_UNCOMPRESSED_REAL | CS_OPT_ON));
1167+
(CS_OPT_DETAIL_REAL | CS_OPT_ON));
11691168
}
11701169

11711170
count = cs_disasm(handle, assembly, size, address, 0, &insn);

‎docs/cs_v6_release_guide.md‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -251,18 +251,18 @@ Nonetheless, we hope this additional information is useful to you.
251251
[![Details flags table](images/details_flags.png)](html/details_flags_table.html)
252252

253253
* Notice that despite the apparent complexity of the rules above, there are really only 4 distinct outcomes:
254-
- An instruction is treated normally (as itself)
255-
- An instruction is treated as if it's the uncompressed form of itself (if it's compressed)
256-
- An instruction is treated as if it's the alias form of itself (whether compressed or not)
257-
- An instruction is treated as if it's the alias form of its uncompressed form (if it's compressed)
254+
- An instruction is treated exactly as decoded (No uncompression and no aliasing happens)
255+
- An instruction is treated as if it's the uncompressed form (if it's compressed)
256+
- An instruction is treated as if it's the alias form (whether compressed or not)
257+
- Assuming an instruction is compressed: it is uncompressed, then the alias of the uncompressed instruction is printed.
258258
* and then every flag is encoding a different bias or preference over those outcomes:
259-
- Real: has no bias, every instruction is treated as itself
259+
- Real: has no bias, every instruction is always treated exactly as decoded
260260
- Uncompressed Real: has a bias for the uncompressed but non-alias forms
261261
- Alias: has a bias for alias forms, and considers the uncompressed form as a last-resort alias form preferable to the original
262262

263263
- `CS_OPT_SYNTAX_*` and `CS_OPT_DETAIL_*` flag sets are independent and can be chosen separately, in that case their combined effect will take effect. For example `CS_OPT_SYNTAX_REAL` and `CS_OPT_DETAIL_UNCOMPRESSED_REAL` will always preserve the text of compressed instructions but their details will be of the uncompressed equivalents.
264264

265-
- By default, no syntax flag given means `CS_OPT_SYNTAX_ALIAS` and no detail flag given means `CS_OPT_DETAIL_UNCOMPRESSED_REAL`
265+
- **The default case** is: `CS_OPT_SYNTAX_ALIAS` and `CS_OPT_DETAIL_ALIAS`
266266

267267
- Added `reg_access` capstone callback to return all read and written registers for the instructions, including registers used as part of memory operands.
268268
* Note that `reg_access` does NOT treat CSRs as registers, detailed reasons for why can be found in [the PR implementing the feature](https://github.com/capstone-engine/capstone/pull/2895)

‎tests/details/riscv.yaml‎

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -5065,7 +5065,7 @@ test_cases:
50655065
- input:
50665066
bytes: [0x13, 0x00, 0x00, 0x00]
50675067
arch: "CS_ARCH_RISCV"
5068-
options: [CS_MODE_RISCV32, CS_OPT_DETAIL, CS_OPT_SYNTAX_ALIAS]
5068+
options: [CS_MODE_RISCV32, CS_OPT_DETAIL, CS_OPT_DETAIL_UNCOMPRESSED_REAL, CS_OPT_SYNTAX_ALIAS]
50695069
address: 0x1000
50705070
expected:
50715071
insns:
@@ -5112,7 +5112,7 @@ test_cases:
51125112
- input:
51135113
bytes: [0x0a, 0x90]
51145114
arch: "CS_ARCH_RISCV"
5115-
options: [CS_MODE_RISCV32, zihintntl, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_SYNTAX_ALIAS]
5115+
options: [CS_MODE_RISCV32, zihintntl, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_DETAIL_UNCOMPRESSED_REAL, CS_OPT_SYNTAX_ALIAS]
51165116
address: 0x1000
51175117
expected:
51185118
insns:
@@ -5133,7 +5133,7 @@ test_cases:
51335133
- input:
51345134
bytes: [0x01, 0x00]
51355135
arch: "CS_ARCH_RISCV"
5136-
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_SYNTAX_ALIAS]
5136+
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_DETAIL_UNCOMPRESSED_REAL, CS_OPT_SYNTAX_ALIAS]
51375137
address: 0x1000
51385138
expected:
51395139
insns:
@@ -5355,7 +5355,7 @@ test_cases:
53555355
- input:
53565356
bytes: [0x55, 0x45]
53575357
arch: "CS_ARCH_RISCV"
5358-
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_SYNTAX_ALIAS]
5358+
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_DETAIL_UNCOMPRESSED_REAL, CS_OPT_SYNTAX_ALIAS]
53595359
address: 0x1000
53605360
expected:
53615361
insns:
@@ -5379,7 +5379,7 @@ test_cases:
53795379
- input:
53805380
bytes: [0x62, 0x86]
53815381
arch: "CS_ARCH_RISCV"
5382-
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_SYNTAX_ALIAS]
5382+
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_DETAIL_UNCOMPRESSED_REAL, CS_OPT_SYNTAX_ALIAS]
53835383
address: 0x1000
53845384
expected:
53855385
insns:
@@ -5692,7 +5692,7 @@ test_cases:
56925692
- input:
56935693
bytes: [0x13, 0x85, 0x05, 0x00]
56945694
arch: "CS_ARCH_RISCV"
5695-
options: [CS_MODE_RISCV32, CS_OPT_DETAIL, CS_OPT_SYNTAX_REAL]
5695+
options: [CS_MODE_RISCV32, CS_OPT_DETAIL, CS_OPT_DETAIL_UNCOMPRESSED_REAL, CS_OPT_SYNTAX_REAL]
56965696
address: 0x1000
56975697
expected:
56985698
insns:
@@ -5737,7 +5737,7 @@ test_cases:
57375737
- input:
57385738
bytes: [0x0a, 0x90]
57395739
arch: "CS_ARCH_RISCV"
5740-
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, zihintntl, CS_OPT_DETAIL, CS_OPT_SYNTAX_REAL]
5740+
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, zihintntl, CS_OPT_DETAIL, CS_OPT_DETAIL_UNCOMPRESSED_REAL, CS_OPT_SYNTAX_REAL]
57415741
address: 0x1000
57425742
expected:
57435743
insns:
@@ -5758,7 +5758,7 @@ test_cases:
57585758
- input:
57595759
bytes: [0x01, 0x00]
57605760
arch: "CS_ARCH_RISCV"
5761-
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_SYNTAX_REAL]
5761+
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_DETAIL_UNCOMPRESSED_REAL, CS_OPT_SYNTAX_REAL]
57625762
address: 0x1000
57635763
expected:
57645764
insns:
@@ -5835,7 +5835,7 @@ test_cases:
58355835
- input:
58365836
bytes: [0x13, 0x05, 0x50, 0x00]
58375837
arch: "CS_ARCH_RISCV"
5838-
options: [CS_MODE_RISCV32, CS_OPT_DETAIL, CS_OPT_SYNTAX_REAL]
5838+
options: [CS_MODE_RISCV32, CS_OPT_DETAIL, CS_OPT_DETAIL_UNCOMPRESSED_REAL, CS_OPT_SYNTAX_REAL]
58395839
address: 0x1000
58405840
expected:
58415841
insns:
@@ -5967,7 +5967,7 @@ test_cases:
59675967
- input:
59685968
bytes: [0x55, 0x45]
59695969
arch: "CS_ARCH_RISCV"
5970-
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_SYNTAX_REAL]
5970+
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_DETAIL_UNCOMPRESSED_REAL, CS_OPT_SYNTAX_REAL]
59715971
address: 0x1000
59725972
expected:
59735973
insns:
@@ -5990,7 +5990,7 @@ test_cases:
59905990
- input:
59915991
bytes: [0x62, 0x86]
59925992
arch: "CS_ARCH_RISCV"
5993-
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_SYNTAX_REAL]
5993+
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_DETAIL_UNCOMPRESSED_REAL, CS_OPT_SYNTAX_REAL]
59945994
address: 0x1000
59955995
expected:
59965996
insns:
@@ -6322,7 +6322,7 @@ test_cases:
63226322
- input:
63236323
bytes: [0x13, 0x00, 0x00, 0x00]
63246324
arch: "CS_ARCH_RISCV"
6325-
options: [CS_MODE_RISCV32, CS_OPT_DETAIL, CS_OPT_SYNTAX_UNCOMPRESSED_REAL]
6325+
options: [CS_MODE_RISCV32, CS_OPT_DETAIL, CS_OPT_DETAIL_UNCOMPRESSED_REAL, CS_OPT_SYNTAX_UNCOMPRESSED_REAL]
63266326
address: 0x1000
63276327
expected:
63286328
insns:
@@ -6368,7 +6368,7 @@ test_cases:
63686368
- input:
63696369
bytes: [0x0a, 0x90]
63706370
arch: "CS_ARCH_RISCV"
6371-
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, zihintntl, CS_OPT_DETAIL, CS_OPT_SYNTAX_UNCOMPRESSED_REAL]
6371+
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, zihintntl, CS_OPT_DETAIL, CS_OPT_DETAIL_UNCOMPRESSED_REAL, CS_OPT_SYNTAX_UNCOMPRESSED_REAL]
63726372
address: 0x1000
63736373
expected:
63746374
insns:
@@ -6389,7 +6389,7 @@ test_cases:
63896389
- input:
63906390
bytes: [0x01, 0x00]
63916391
arch: "CS_ARCH_RISCV"
6392-
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_SYNTAX_UNCOMPRESSED_REAL]
6392+
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_DETAIL_UNCOMPRESSED_REAL, CS_OPT_SYNTAX_UNCOMPRESSED_REAL]
63936393
address: 0x1000
63946394
expected:
63956395
insns:
@@ -6466,7 +6466,7 @@ test_cases:
64666466
- input:
64676467
bytes: [0x55, 0x45]
64686468
arch: "CS_ARCH_RISCV"
6469-
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_SYNTAX_UNCOMPRESSED_REAL]
6469+
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_DETAIL_UNCOMPRESSED_REAL, CS_OPT_SYNTAX_UNCOMPRESSED_REAL]
64706470
address: 0x1000
64716471
expected:
64726472
insns:
@@ -6489,7 +6489,7 @@ test_cases:
64896489
- input:
64906490
bytes: [0x62, 0x86]
64916491
arch: "CS_ARCH_RISCV"
6492-
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_SYNTAX_UNCOMPRESSED_REAL]
6492+
options: [CS_MODE_RISCV32, CS_MODE_RISCV_C, CS_OPT_DETAIL, CS_OPT_DETAIL_UNCOMPRESSED_REAL, CS_OPT_SYNTAX_UNCOMPRESSED_REAL]
64936493
address: 0x1000
64946494
expected:
64956495
insns:

0 commit comments

Comments
 (0)