- Replaced specific assembly instructions with dc.w for invalid cases.

- Added new test cases for SBCD, PACK, UNPK, CHK.L, and coprocessor instructions to ensure correct behavior across different CPU models.
- Ensured that invalid instructions for CPU32 and 68000 are correctly identified.
- Updated expected outputs for fsdiv and PMMU related instructions to reflect their validity on specific architectures.

Author: b1llow