Add tests for bitfield instructions and PC-relative addressing in m68k.yaml

Author: b1llow

arch/M68K/M68KDisassembler.c

@@ -494,7 +494,10 @@ static void get_with_index_address_mode(m68k_info *info, cs_m68k_op *op,
 					uint32_t instruction, uint32_t size,
 					bool is_pc)
 {
+	uint32_t ext_addr = info->pc;
 	uint32_t extension = read_imm_16(info);
+	int32_t pc_adjust =
+		is_pc ? (int32_t)(ext_addr - info->baseAddress - 2) : 0;
 
 	op->address_mode = M68K_AM_AREGI_INDEX_BASE_DISP;
 
@@ -511,6 +514,7 @@ static void get_with_index_address_mode(m68k_info *info, cs_m68k_op *op,
 					 read_imm_32(info) :
 					 (int16_t)read_imm_16(info)) :
 				0;
+		op->mem.in_disp += pc_adjust;
 
 		op->mem.in_disp_size =
 			EXT_BASE_DISPLACEMENT_PRESENT(extension) &&
@@ -590,6 +594,7 @@ static void get_with_index_address_mode(m68k_info *info, cs_m68k_op *op,
 	}
 
 	op->mem.disp = (int8_t)(extension & 0xff);
+	op->mem.disp += pc_adjust;
 	op->mem.disp_size = 0;
 
 	if (EXT_INDEX_SCALE(extension)) {
@@ -712,12 +717,22 @@ static void get_ea_mode_op(m68k_info *info, cs_m68k_op *op,
 		op->imm = read_imm_32(info);
 		break;
 
-	case 0x3a:
+	case 0x3a: {
 		/* program counter with displacement */
+		/* The printer computes the effective address as
+		 * instruction_start + 2 + disp, assuming the displacement
+		 * extension word immediately follows the opcode word.
+		 * When extra words precede the EA (e.g. an immediate in
+		 * BTST #imm,disp(PC)), the displacement word is further
+		 * along.  Adjust disp so the printer still produces the
+		 * correct absolute address. */
+		uint32_t disp_addr = info->pc;
 		op->address_mode = M68K_AM_PCI_DISP;
 		op->mem.disp = (int16_t)read_imm_16(info);
+		op->mem.disp += (int16_t)(disp_addr - info->baseAddress - 2);
 		op->mem.disp_size = 1;
 		break;
+	}
 
 	case 0x3b:
 		/* program counter with index */
@@ -1761,31 +1776,33 @@ static void d68010_bkpt(m68k_info *info)
 
 static void d68020_bfchg(m68k_info *info)
 {
-	LIMIT_CPU_TYPES(info, M68020_PLUS);
+	/* Bit field ops are 68020+ only; CPU32 does NOT support them
+	 * despite sharing TYPE_68020. */
+	LIMIT_CPU_TYPES_NOT_CPU32(info, M68020_PLUS);
 	build_bitfield_ins(info, M68K_INS_BFCHG, false);
 }
 
 static void d68020_bfclr(m68k_info *info)
 {
-	LIMIT_CPU_TYPES(info, M68020_PLUS);
+	LIMIT_CPU_TYPES_NOT_CPU32(info, M68020_PLUS);
 	build_bitfield_ins(info, M68K_INS_BFCLR, false);
 }
 
 static void d68020_bfexts(m68k_info *info)
 {
-	LIMIT_CPU_TYPES(info, M68020_PLUS);
+	LIMIT_CPU_TYPES_NOT_CPU32(info, M68020_PLUS);
 	build_bitfield_ins(info, M68K_INS_BFEXTS, true);
 }
 
 static void d68020_bfextu(m68k_info *info)
 {
-	LIMIT_CPU_TYPES(info, M68020_PLUS);
+	LIMIT_CPU_TYPES_NOT_CPU32(info, M68020_PLUS);
 	build_bitfield_ins(info, M68K_INS_BFEXTU, true);
 }
 
 static void d68020_bfffo(m68k_info *info)
 {
-	LIMIT_CPU_TYPES(info, M68020_PLUS);
+	LIMIT_CPU_TYPES_NOT_CPU32(info, M68020_PLUS);
 	build_bitfield_ins(info, M68K_INS_BFFFO, true);
 }
 
@@ -1794,7 +1811,7 @@ static void d68020_bfins(m68k_info *info)
 	cs_m68k *ext = &info->extension;
 	cs_m68k_op temp;
 
-	LIMIT_CPU_TYPES(info, M68020_PLUS);
+	LIMIT_CPU_TYPES_NOT_CPU32(info, M68020_PLUS);
 	build_bitfield_ins(info, M68K_INS_BFINS, true);
 
 	// a bit hacky but we need to flip the args on only this instruction
@@ -1806,12 +1823,13 @@ static void d68020_bfins(m68k_info *info)
 
 static void d68020_bfset(m68k_info *info)
 {
-	LIMIT_CPU_TYPES(info, M68020_PLUS);
+	LIMIT_CPU_TYPES_NOT_CPU32(info, M68020_PLUS);
 	build_bitfield_ins(info, M68K_INS_BFSET, false);
 }
 
 static void d68020_bftst(m68k_info *info)
 {
+	LIMIT_CPU_TYPES_NOT_CPU32(info, M68020_PLUS);
 	build_bitfield_ins(info, M68K_INS_BFTST, false);
 }
 

tests/details/m68k.yaml

@@ -2403,3 +2403,114 @@ test_cases:
         asm_text: "dc.w $f000"
       -
         asm_text: "move.l d0, d2"
+
+  # Bug 15a: Bitfield instructions (bftst etc.) must be illegal on 68000
+  # Full encoding: e8f8 0800 009c = bftst $9c.w{d0:32} on 68020+
+  # On 68000, e8f8 has size bits=11 which is undefined → dc.w, remainder = btst
+  -
+    input:
+      bytes: [ 0xe8, 0xf8, 0x08, 0x00, 0x00, 0x9c ]
+      arch: "m68k"
+      options: [ CS_OPT_DETAIL, CS_MODE_BIG_ENDIAN, CS_MODE_M68K_000 ]
+      address: 0x0
+    expected:
+      insns:
+      -
+        asm_text: "dc.w $e8f8"
+      -
+        asm_text: "btst.b #$9c, d0"
+
+  # Bug 15b: Bitfield instructions must be illegal on CPU32
+  # CPU32 has TYPE_68020|TYPE_CPU32, so LIMIT_CPU_TYPES_NOT_CPU32 rejects it
+  -
+    input:
+      bytes: [ 0xe8, 0xf8, 0x08, 0x00, 0x00, 0x9c ]
+      arch: "m68k"
+      options: [ CS_OPT_DETAIL, CS_MODE_BIG_ENDIAN, CS_MODE_M68K_CPU32 ]
+      address: 0x0
+    expected:
+      insns:
+      -
+        asm_text: "dc.w $e8f8"
+      -
+        asm_text: "btst.b #$9c, d0"
+
+  # Bug 15c: Bitfield instructions valid on 68020 — full 3-word encoding
+  -
+    input:
+      bytes: [ 0xe8, 0xf8, 0x08, 0x00, 0x00, 0x9c ]
+      arch: "m68k"
+      options: [ CS_OPT_DETAIL, CS_MODE_BIG_ENDIAN, CS_MODE_M68K_020 ]
+      address: 0x0
+    expected:
+      insns:
+      -
+        asm_text: "bftst $9c.w{0:32}"
+        details:
+          m68k:
+            operands:
+              -
+                type: M68K_OP_MEM
+                address_mode: M68K_AM_ABSOLUTE_DATA_SHORT
+
+  # Bug 16: btst PC-relative displacement (case 0x3a) must account for
+  # extra words consumed before the displacement word.
+  # Encoding: 083a 00e8 0a54 at address 0x1050
+  # btst #$e8, d16(PC) where d16=0x0a54, read at PC=0x1054
+  # Target: 0x1054 + 0x0a54 = 0x1aa8
+  # Printer: pc + 2 + disp = 0x1050 + 2 + disp => disp must be 0xa56
+  -
+    input:
+      bytes: [ 0x08, 0x3a, 0x00, 0xe8, 0x0a, 0x54 ]
+      arch: "m68k"
+      options: [ CS_OPT_DETAIL, CS_MODE_BIG_ENDIAN, CS_MODE_M68K_000 ]
+      address: 0x1050
+    expected:
+      insns:
+      -
+        asm_text: "btst.b #$e8, $1aa8(pc)"
+        details:
+          m68k:
+            operands:
+              -
+                type: M68K_OP_IMM
+                imm: 0xe8
+              -
+                type: M68K_OP_MEM
+                mem:
+                  disp: 0xa56
+                  disp_size: 1
+                address_mode: M68K_AM_PCI_DISP
+
+  # Bug 17: btst PC-relative indexed (case 0x3b) must account for
+  # extra words consumed before the extension word.
+  # Encoding: 083b 0038 0039 at address 0x3400
+  # btst #$38, (d8,PC,d0.w) where ext=0x0039 (brief: d0.w*1, disp=0x39)
+  # Extension read at PC=0x3404
+  # Target: 0x3404 + 0x39 = 0x343d
+  # Printer: pc + 2 + disp = 0x3400 + 2 + disp => disp must be 0x3b
+  -
+    input:
+      bytes: [ 0x08, 0x3b, 0x00, 0x38, 0x00, 0x39 ]
+      arch: "m68k"
+      options: [ CS_OPT_DETAIL, CS_MODE_BIG_ENDIAN, CS_MODE_M68K_000 ]
+      address: 0x3400
+    expected:
+      insns:
+      -
+        asm_text: "btst.b #$38, $343d(pc, d0.w)"
+        details:
+          regs_read: [ d0, pc ]
+          m68k:
+            operands:
+              -
+                type: M68K_OP_IMM
+                imm: 0x38
+              -
+                type: M68K_OP_MEM
+                mem:
+                  base_reg: pc
+                  index_reg: d0
+                  index_size: -1
+                  disp: 0x3b
+                address_mode: M68K_AM_PCI_INDEX_8_BIT_DISP