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Merge pull request #97 from casper-astro/casper-astro-soak-test
Casper astro soak test
2 parents f489c34 + 7ba79d1 commit d779990

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5 files changed

+2
-9
lines changed

5 files changed

+2
-9
lines changed

xps_library/adc083000_mask.m

Lines changed: 1 addition & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -237,16 +237,9 @@
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ds_factor = 8;
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end
239239

240-
% add signal convert block
241-
reuse_block(cursys, [gateway_in_name, '_conv'], 'xps_library/ADCs/conv', ...
242-
'Position', convert_pos, ...
243-
'bit_width', num2str(sample_bit_width));
244-
245-
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add_line( cursys, [adc_sim_block, '/', num2str( mod(sim_port,port_mod_factor)+1 )], [gateway_in_name, '/1'] );
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sim_port = sim_port +1;
248-
add_line( cursys, [gateway_in_name,'/1'], [gateway_in_name, '_conv/1']);
249-
add_line( cursys, [gateway_in_name, '_conv/1'], [port, '/1']);
242+
add_line( cursys, [gateway_in_name,'/1'], [port, '/1']);
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elseif regexp( port, '(adc\d+)_outofrange' ),
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toks = regexp( port, '(adc\d+)_(\w+)$', 'tokens');
252245
if clock_sync,

xps_library/adc_common.m

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -192,7 +192,7 @@
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if ds == out-1,
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or_name = ['logical',num2str(d)];
195-
reuse_block(blk, or_name, 'built-in/Logical Operator', ...
195+
reuse_block(blk, or_name, 'simulink/Logic and Bit Operations/Logical Operator', ...
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'Inputs', num2str(out*2), 'Operator', 'OR', ...
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'Position', [xtick*7-15 ytick*(yoff+2)-15 xtick*7+15 ytick*(yoff+2)+15]);
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for ofn = 0:out-1

xps_library/xps_library.slx

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