🎨 Incorporated pre-commit fixes

Author: pre-commit-ci[bot]

experiments/standard_cell_design/quickcell_vs_automatic_exhaustive_2_input.cpp

@@ -120,7 +120,7 @@ int main()  // NOLINT
             fiction::cell<sidb_100_cell_clk_lyt_siqad>>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER;
         params_2_in_1_out.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS;
         params_2_in_2_out.design_mode                     = design_sidb_gates_params<
-                                fiction::cell<sidb_100_cell_clk_lyt_siqad>>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER;
+            fiction::cell<sidb_100_cell_clk_lyt_siqad>>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER;
         params_2_in_2_out.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS;
 
         params_1_in_1_out_straight.design_mode = design_sidb_gates_params<

include/fiction/algorithms/graph/mincross.hpp

@@ -322,7 +322,7 @@ class mincross_impl
                         {
                             const double w = (positions[lm] * static_cast<double>(rspan)) +
                                              (positions[rm] * static_cast<double>(lspan));
-                            median_map[n] = w / (lspan + rspan);
+                            median_map[n]  = w / (lspan + rspan);
                         }
                     }
                 }

include/fiction/algorithms/physical_design/graph_oriented_layout_design.hpp

@@ -1785,7 +1785,7 @@ class graph_oriented_layout_design_impl
         {
             const auto bb = bounding_box_2d(layout);
             cost          = (layout.num_crossings() + 1) *
-                   (static_cast<uint64_t>(bb.get_max().x + 1u) * static_cast<uint64_t>(bb.get_max().y + 1u));
+                            (static_cast<uint64_t>(bb.get_max().x + 1u) * static_cast<uint64_t>(bb.get_max().y + 1u));
         }
         else if (cost_function == graph_oriented_layout_design_params::cost_objective::CUSTOM)
         {

include/fiction/technology/charge_distribution_surface.hpp

@@ -679,8 +679,8 @@ class charge_distribution_surface<Lyt, false> : public Lyt
                 {
                     const auto dist = sidb_nm_distance<Lyt>(*this, c1, c);
                     const auto pot  = chargeless_potential_generated_by_defect_at_given_distance(dist, defect) *
-                                     static_cast<double>(defect.charge);
-                    const auto ix = static_cast<uint64_t>(cell_to_index(c1));
+                                      static_cast<double>(defect.charge);
+                    const auto ix   = static_cast<uint64_t>(cell_to_index(c1));
 
                     strg->local_pot_caused_by_defects[ix] += pot;
                     strg->local_int_pot[ix] += pot;

test/algorithms/physical_design/design_sidb_gates.cpp

@@ -256,7 +256,7 @@ TEST_CASE("Use SiQAD's AND gate skeleton to generate all possible AND gates", "[
         params.canvas                 = {{4, 4, 0}, {4, 4, 0}};
         params.number_of_canvas_sidbs = 0;
         params.design_mode            = design_sidb_gates_params<
-                       cell<sidb_100_cell_clk_lyt_siqad>>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER;
+            cell<sidb_100_cell_clk_lyt_siqad>>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER;
         const auto found_gate_layouts_exhaustive = design_sidb_gates(lyt, std::vector<tt>{create_and_tt()}, params);
         CHECK(found_gate_layouts_exhaustive.empty());
         params.design_mode =
@@ -270,7 +270,7 @@ TEST_CASE("Use SiQAD's AND gate skeleton to generate all possible AND gates", "[
         params.canvas                 = {{4, 2, 0}, {14, 8, 1}};
         params.number_of_canvas_sidbs = 2;
         params.design_mode            = design_sidb_gates_params<
-                       cell<sidb_100_cell_clk_lyt_siqad>>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER;
+            cell<sidb_100_cell_clk_lyt_siqad>>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER;
 
         sidb_defect_surface defect_layout{lyt};
         defect_layout.assign_sidb_defect(

test/algorithms/simulation/sidb/displacement_robustness_domain.cpp

@@ -76,7 +76,7 @@ TEST_CASE("Determine the SiDB gate displacement robustness of the Y-shaped SiDB
         displacement_robustness_domain_stats stats{};
         params.displacement_variations = {0, 2};
         params.dimer_policy            = displacement_robustness_domain_params<
-                       cell<sidb_cell_clk_lyt_siqad>>::dimer_displacement_policy::STAY_ON_ORIGINAL_DIMER;
+            cell<sidb_cell_clk_lyt_siqad>>::dimer_displacement_policy::STAY_ON_ORIGINAL_DIMER;
         params.operational_params.input_bdl_iterator_params.bdl_wire_params.bdl_pairs_params.maximum_distance = 3.0;
         params.operational_params.input_bdl_iterator_params.bdl_wire_params.bdl_pairs_params.minimum_distance = 0.2;