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cedricbompartcedricbompart
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added MMU utils, removed source includes
1 parent 7a820de commit 4630c5f

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8 files changed

+460
-127
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8 files changed

+460
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‎platform/generic/mmu_utils.c‎

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#include "lolevel.h"
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#include "mmu_utils.h"
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#define SECTION_SIZE (0x100000)
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#define L2_LARGEPAGE_MEMTYPE_MASK (0x700c)
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// load next word to PC, word aligned
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#define LDRW_PC_PC_T2 0xf000f8df
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unsigned get_l2_largepage_flags_from_l1_section(unsigned addr,
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unsigned l1tableaddr) {
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// alignment check
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if (l1tableaddr & 0x3fff) {
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return 0xffffffff;
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}
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// sanitize address
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addr &= 0xfff00000;
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unsigned l1at = l1tableaddr;
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if (addr < 0x2000000) {
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return 0xffffffff;
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//l1at = l1tableaddr + 0x4000 + 0x400 + 0x400 + coreid * 0x80;
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}
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unsigned sat = (addr >> 20) << 2;
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unsigned *entry = (unsigned*) (l1at + sat);
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unsigned val = *entry;
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// must be section or supersection
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if ((val & 3) != 2) {
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return 0xffffffff;
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}
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unsigned retval = 0;
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retval |= (val & 0x38000) >> 6; // nG, S, APX bits
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retval |= (val & 0x7000); // TEX bits (mem type, cacheability)
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retval |= (val & 0x10) << 11; // XN bit
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retval |= (val & 0xc); // C, B bits (mem type, cacheability)
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retval |= (val & 0xc00) >> 6; // AP bits
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return retval;
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}
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int split_l1_supersection(unsigned addr, unsigned l1tableaddr) {
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// alignment check
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if (l1tableaddr & 0x3fff) {
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return -1;
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}
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// sanitize address
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addr &= 0xff000000;
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unsigned l1at = l1tableaddr;
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if (addr < 0x2000000) {
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return -3;
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//l1at = l1tableaddr + 0x4000 + 0x400 + 0x400 + coreid * 0x80;
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}
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unsigned modat = (addr >> 24) << 6;
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unsigned n, m = 0;
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for (n = 0; n < 16; n++) {
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unsigned *entry = (unsigned*) (l1at + modat + n * 4);
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unsigned val = *entry;
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// leave when not supersection
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if ((val & 0x40003) != 0x40002) {
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return -2;
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}
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*entry = (val & 0xfffbffff) | m;
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m += SECTION_SIZE;
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}
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return 0;
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}
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int assign_l2_table_to_l1_section(unsigned addr, unsigned l1tableaddr,
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unsigned l2tableaddr) {
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// alignment check
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if (l1tableaddr & 0x3fff || l2tableaddr & 0x3ff) {
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return -1;
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}
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// sanitize address
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addr &= 0xfff00000;
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unsigned l1at = l1tableaddr;
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if (addr < 0x2000000) {
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return -1;
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//l1at = l1tableaddr + 0x4000 + 0x400 + 0x400 + coreid * 0x80;
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}
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unsigned modat = (addr >> 20) << 2;
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unsigned *entry = (unsigned*) (l1at + modat);
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unsigned val = *entry;
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// must be section or L2 reference, not supersection
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if ((val & 0x40003) == 0x40002) {
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return -2;
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}
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*entry = l2tableaddr | 1;
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return 0;
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}
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int create_l2_table(unsigned addr, unsigned l2tableaddr, unsigned flags) {
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// alignment check
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if (l2tableaddr & 0x3ff) {
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return -1;
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}
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// sanitize address
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addr &= 0xfff00000;
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// set 'large page' flag
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flags = (flags & 0xfffffffc) | 1;
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unsigned m, n;
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for (n = 0; n < SECTION_SIZE; n += PAGE_SIZE) {
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for (m = 0; m < 16; m++) {
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unsigned *entry = (unsigned*) (l2tableaddr + m * 4);
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*entry = (addr + n) | flags;
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}
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l2tableaddr += 0x40;
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}
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return 0;
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}
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int replace_large_page_in_l2_table(unsigned addr, unsigned replacement,
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unsigned l2tableaddr, unsigned flags) {
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// alignment check
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if (l2tableaddr & 0x3ff || addr & 0xffff || replacement & 0xffff) {
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return -1;
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}
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// set 'large page' flag
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flags = (flags & 0xfffffffc) | 1;
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addr = (addr >> 16) & 0xf;
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l2tableaddr += addr * 0x40;
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unsigned m;
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for (m = 0; m < 16; m++) {
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unsigned *entry = (unsigned*) (l2tableaddr + m * 4);
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*entry = replacement | flags;
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}
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return 0;
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}
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void replace_rom_page(unsigned romaddr, unsigned ramaddr, unsigned l2addr,
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unsigned flags) {
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// copy 64kB "large" page to RAM
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_memcpy((void*) ramaddr, (void*) romaddr, PAGE_SIZE);
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// make L2 table entry point to copied ROM content
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replace_large_page_in_l2_table(romaddr, ramaddr, l2addr, flags);
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}
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void replace_section_with_l2_tbl(unsigned romaddr, unsigned l1addr,
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unsigned l2addr, unsigned flags) {
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// make a L2 table
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create_l2_table(romaddr, l2addr, flags);
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// assign the new L2 table to the desired section of ROM (covers 1MB)
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assign_l2_table_to_l1_section(romaddr, l1addr, l2addr);
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}
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void place_fw_hook_t2_64b(unsigned orig, void *new, unsigned origram) {
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unsigned *newa = (unsigned*) ((unsigned) new & 0xfffffffc);
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*newa = *(unsigned*) orig;
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*(newa + 1) = *(unsigned*) (orig + 4);
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*(newa + 2) = LDRW_PC_PC_T2;
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*(newa + 3) = (orig + 8) | 1;
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*(unsigned*) (origram) = LDRW_PC_PC_T2;
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*(unsigned*) (origram + 4) = ((unsigned) new + 16) | 1;
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}
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void place_fw_patch_t2_64b(void *new, unsigned origram) {
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*(unsigned*) (origram) = LDRW_PC_PC_T2;
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*(unsigned*) (origram + 4) = ((unsigned) new) | 1;
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}
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‎platform/generic/mmu_utils.h‎

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/**
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* Cortex A9
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*
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* Smallest possible L1 chunk is 1MB (a supersection is 16MB).
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* A L2 table is for splitting a 1MB chunk into 64kB or even 4kB chunks.
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* The fewer/larger chunks the better performance.
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*
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* The below translation table manipulation functions assume the Canon FW table arrangement:
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* - 0x4000 bytes of L1 table for both cores, describing addresses from 32MB upwards
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* - 0x400 bytes of L2 table describing address range 0...1024kB, core0
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* - 0x400 bytes of L2 table describing address range 0...1024kB, core1
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* - 0x80 bytes of L1 table describing address range 0...32MB, core0
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* - 0x80 bytes of L1 table describing address range 0...32MB, core1
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*
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* @note manipulation of the first 32MB is not supported (those are core-specific and RAM anyway).
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*/
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#ifndef MMU_UTILS_H
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#define MMU_UTILS_H
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#define PAGE_SIZE (0x10000)
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#define B_INSTR_ARM(pc,dest) \
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( 0xEA000000 \
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| ((( ((unsigned)dest) - ((unsigned)pc) - 8 ) >> 2) & 0x00FFFFFF) \
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)
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// thumb-2 32-bit bl instruction (verification pending)
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#define BL_INSTR_T1(addr, target) \
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( 0xd000f000 \
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| (( (((unsigned)target-(unsigned)addr-4)>>1) & 0x7ff) << 16) \
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| ( (((unsigned)target-(unsigned)addr-4)>>12) & 0x3ff) \
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| ( (((unsigned)target-(unsigned)addr-4)&0x80000000)?0x400:0) \
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| (( (((unsigned)target-(unsigned)addr-4)&0x80000000) == \
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((((unsigned)target-(unsigned)addr-4)&0x400000)<<9))?0x8000000:0) \
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| (( (((unsigned)target-(unsigned)addr-4)&0x80000000) == \
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((((unsigned)target-(unsigned)addr-4)&0x800000)<<8))?0x20000000:0) \
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)
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// thumb-2 16-bit branch instruction, t2 encoding
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#define B_INSTR_T2(addr, target) \
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( 0xe000 \
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| ( (((unsigned)target - (unsigned)addr - 4) >> 1) & 0x7ff ) \
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)
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// thumb-2 32-bit branch instruction (verification pending)
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#define B_INSTR_T4(addr, target) \
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( 0x9000f000 \
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| (( (((unsigned)target-(unsigned)addr-4)>>1) & 0x7ff) << 16) \
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| ( (((unsigned)target-(unsigned)addr-4)>>12) & 0x3ff) \
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| ( (((unsigned)target-(unsigned)addr-4)&0x80000000)?0x400:0) \
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| (( (((unsigned)target-(unsigned)addr-4)&0x80000000) == \
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((((unsigned)target-(unsigned)addr-4)&0x400000)<<9))?0x8000000:0) \
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| (( (((unsigned)target-(unsigned)addr-4)&0x80000000) == \
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((((unsigned)target-(unsigned)addr-4)&0x800000)<<8))?0x20000000:0) \
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)
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/**
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* Retrieves L1 translation table flags in L2 table large page entry format.
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*
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* @param addr address of source virtual memory chunk (section or supersection in L1 table)
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* @param l1tableaddr physical address of Canon-style L1 table (the 16kB aligned main L1 table at its start, to be exact)
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* @return 0xffffffff in case of inappropriate table address or unexpected L1 table content, otherwise the flags are returned
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*/
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unsigned get_l2_largepage_flags_from_l1_section(unsigned addr,
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unsigned l1tableaddr);
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/**
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* Split a 16MB supersection into 16 sections (in place), so that L2 tables can be assigned to them.
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*
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* @param addr address of 16MB chunk of virtual memory
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* @param l1tableaddr physical address of Canon-style L1 table (the 0x4000-byte-aligned main L1 table at its start, to be exact)
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* @return nonzero in case of inappropriate table address or missing supersection
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*/
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int split_l1_supersection(unsigned addr, unsigned l1tableaddr);
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/**
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* Assign a L2 table to a 1MB section of virtual address range, usually requires previous use of <code>split_l1_supersection</code>.
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*
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* @apram addr address of virtual memory chunk (16MB, aligned to 16MB)
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* @param l1tableaddr physical address of Canon-style L1 table (the 16kB aligned main L1 table at its start, to be exact)
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* @param l2tableaddr physical address of L2 table (1024 bytes, 1024-byte alignment)
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* @return nonzero in case of inappropriate table address or unexpected L1 table content
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*/
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int assign_l2_table_to_l1_section(unsigned addr, unsigned l1tableaddr,
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unsigned l2tableaddr);
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/**
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* Create L2 table for 1MB memory at addr, with large pages (64kB).
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*
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* @param addr address of virtual memory chunk (1MB, aligned to 1MB)
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* @param l2tableaddr physical address of L2 table (1024 bytes, 1024-byte alignment)
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* @param flags flags in the new page table entries (should probably match those in respective part of L1 table)
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* @return nonzero in case of inappropriate table address
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*/
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int create_l2_table(unsigned addr, unsigned l2tableaddr, unsigned flags);
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/**
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* Patch one large (64kB) page in L2 table to point to a different part of physical memory.
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*
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* @param addr offset of virtual memory chunk (64kB, aligned to 64kB) inside the 1MB range of L2 table
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* @param replacement address of physical memory chunk (64kB, aligned to 64kB)
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* @param l2tableaddr physical address of L2 table (1024 bytes, 1024-byte alignment)
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* @param flags flags in the new page table entries (should probably match those in respective part of L1 table)
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* @return nonzero in case of inappropriate addresses
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*/
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int replace_large_page_in_l2_table(unsigned addr, unsigned replacement,
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unsigned l2tableaddr, unsigned flags);
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/**
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* Replace a 64kB large ROM page with its RAM copy.
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*
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* @param romaddr start of ROM page (64kB aligned), has to fall within the range of L2 table
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* @param ramaddr suitable 64kB aligned RAM address
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* @param l2addr existing L2 table's address
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* @param flags L2 table entry flags
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*/
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void replace_rom_page(unsigned romaddr, unsigned ramaddr, unsigned l2addr,
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unsigned flags);
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/**
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* Replace L1 section with newly created L2 table.
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*
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* @param romaddr start of ROM section (1024kB aligned)
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* @param l1addr address of Canon-style MMU tables
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* @param l2addr L2 table to be placed at this address (0x400-byte alignment)
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* @param flags L2 table entry flags
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*/
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void replace_section_with_l2_tbl(unsigned romaddr, unsigned l1addr,
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unsigned l2addr, unsigned flags);
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/**
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* Function to place a hook, requires 32-bit alignment, assumes thumb2 code.
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* The hook function needs 4 words space at its start after which the hook code must be placed.
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* When the hook is finished, jumping to start takes care of returning to "ROM".
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* Hook code must save and restore registers (either everything or according to context).
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* The replaced two words must contain an integer number of instructions, must not contain branch target also,
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* the copied instructions must not depend on PC (such as branches, ldr, adr, etc).
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*
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* @param orig original "ROM" address, must actually be RAM mapped there
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* @param new address of hook code in RAM
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* @param origram RAM representation of 'orig' (that can be written)
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*/
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void place_fw_hook_t2_64b(unsigned orig, void *new, unsigned origram);
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/**
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* Version of <code>place_fw_hook_t2_64b</code> for non-hook use.
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*
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* @param new address of replacement code in RAM
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* @param origram address of code in RAM, typically in a copied 64kB ROM page
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*/
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void place_fw_patch_t2_64b(void *new, unsigned origram);
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#endif

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