@@ -25,6 +25,7 @@ LOG_MODULE_REGISTER(pwm_numaker, CONFIG_PWM_LOG_LEVEL);
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#define NUMAKER_SYSCLK_FREQ DT_PROP(DT_NODELABEL(sysclk), clock_frequency)
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/* EPWM channel 0~5 mask */
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#define NUMAKER_PWM_CHANNEL_MASK (0x3FU)
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+ #define NUMAKER_PWM_HCLK0 1U
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/* Device config */
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struct pwm_numaker_config {
@@ -432,6 +433,29 @@ static int pwm_numaker_clk_get_rate(EPWM_T *epwm, uint32_t *rate)
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uint32_t clk_src ;
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uint32_t epwm_clk_src ;
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+ #if defined(CONFIG_SOC_SERIES_M55M1X )
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+ if (epwm == EPWM0 ) {
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+ clk_src = CLK -> EPWMSEL & CLK_EPWMSEL_EPWM0SEL_Msk ;
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+ } else if (epwm == EPWM1 ) {
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+ clk_src = CLK -> EPWMSEL & CLK_EPWMSEL_EPWM1SEL_Msk ;
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+ } else {
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+ LOG_ERR ("Invalid EPWM node" );
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+ return - EINVAL ;
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+ }
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+
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+ if (clk_src == NUMAKER_PWM_HCLK0 ) {
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+ /* clock source is from HCLK0 clock */
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+ epwm_clk_src = CLK_GetHCLK0Freq ();
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+ } else {
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+ /* clock source is from PCLK */
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+ SystemCoreClockUpdate ();
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+ if (epwm == EPWM0 ) {
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+ epwm_clk_src = CLK_GetPCLK0Freq ();
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+ } else { /* (epwm == EPWM1) */
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+ epwm_clk_src = CLK_GetPCLK2Freq ();
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+ }
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+ }
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+ #else
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if (epwm == EPWM0 ) {
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clk_src = CLK -> CLKSEL2 & CLK_CLKSEL2_EPWM0SEL_Msk ;
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} else if (epwm == EPWM1 ) {
@@ -453,6 +477,7 @@ static int pwm_numaker_clk_get_rate(EPWM_T *epwm, uint32_t *rate)
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epwm_clk_src = CLK_GetPCLK1Freq ();
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}
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}
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+ #endif
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* rate = epwm_clk_src ;
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return 0 ;
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}
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